[PATCH] x86_64: designate most general purpose and SSE registers as callee save under coldcc

[Peter Collingbourne]

http://llvm-reviews.chandlerc.com/D435

Files:
  lib/Target/X86/X86CallingConv.td
  lib/Target/X86/X86RegisterInfo.cpp
  test/CodeGen/X86/coldcc64.ll

Index: lib/Target/X86/X86CallingConv.td
===================================================================
--- lib/Target/X86/X86CallingConv.td
+++ lib/Target/X86/X86CallingConv.td
@@ -519,6 +519,9 @@
 def CSR_Win64 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15,
                                      (sequence "XMM%u", 6, 15))>;
 
+def CSR_MostRegs_64 : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10,
+                                           R11, R12, R13, R14, R15, RBP,
+                                           (sequence "XMM%u", 0, 15))>;
 
 // Standard C + YMM6-15
 def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
Index: lib/Target/X86/X86RegisterInfo.cpp
===================================================================
--- lib/Target/X86/X86RegisterInfo.cpp
+++ lib/Target/X86/X86RegisterInfo.cpp
@@ -239,14 +239,16 @@
   bool ghcCall = false;
   bool oclBiCall = false;
   bool hipeCall = false;
+  bool coldCall = false;
   bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX();
 
   if (MF) {
     callsEHReturn = MF->getMMI().callsEHReturn();
     const Function *F = MF->getFunction();
     ghcCall = (F ? F->getCallingConv() == CallingConv::GHC : false);
     oclBiCall = (F ? F->getCallingConv() == CallingConv::Intel_OCL_BI : false);
     hipeCall = (F ? F->getCallingConv() == CallingConv::HiPE : false);
+    coldCall = (F ? F->getCallingConv() == CallingConv::Cold : false);
   }
 
   if (ghcCall || hipeCall)
@@ -260,6 +262,8 @@
         return CSR_64_Intel_OCL_BI_SaveList;
   }
   if (Is64Bit) {
+    if (coldCall)
+      return CSR_MostRegs_64_SaveList;
     if (IsWin64)
       return CSR_Win64_SaveList;
     if (callsEHReturn)
@@ -287,6 +291,8 @@
     return CSR_NoRegs_RegMask;
   if (!Is64Bit)
     return CSR_32_RegMask;
+  if (CC == CallingConv::Cold)
+    return CSR_MostRegs_64_RegMask;
   if (IsWin64)
     return CSR_Win64_RegMask;
   return CSR_64_RegMask;
Index: test/CodeGen/X86/coldcc64.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/coldcc64.ll
@@ -0,0 +1,69 @@
+; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+
+define coldcc i64 @foo(i64 %a) {
+; CHECK: pushq %rbp
+; CHECK: pushq %r15
+; CHECK: pushq %r14
+; CHECK: pushq %r13
+; CHECK: pushq %r12
+; CHECK: pushq %r11
+; CHECK: pushq %r10
+; CHECK: pushq %r9
+; CHECK: pushq %r8
+; CHECK: pushq %rdi
+; CHECK: pushq %rsi
+; CHECK: pushq %rdx
+; CHECK: pushq %rcx
+; CHECK: pushq %rbx
+  %b = add i64 %a, %a
+  %c = add i64 %b, %b
+  %d = add i64 %c, %c
+  %e = add i64 %d, %d
+  %f = add i64 %e, %e
+  %g = add i64 %f, %f
+  %h = add i64 %g, %g
+  %i = add i64 %h, %h
+  %j = add i64 %i, %i
+  %k = add i64 %j, %j
+  %l = add i64 %k, %k
+  %m = add i64 %l, %l
+  %n = add i64 %m, %m
+  %o = add i64 %n, %n
+  %p = add i64 %o, %o
+  %q = add i64 %p, %p
+  %r = add i64 %q, %q
+  %s = add i64 %r, %r
+  %t = add i64 %s, %s
+  %u = add i64 %t, %t
+  %v = add i64 %u, %u
+  %w = add i64 %v, %v
+  %x = add i64 %w, %w
+  %y = add i64 %x, %x
+  %z = add i64 %y, %y
+  %b1 = add i64 %a, %z
+  %c1 = add i64 %b, %b1
+  %d1 = add i64 %c, %c1
+  %e1 = add i64 %d, %d1
+  %f1 = add i64 %e, %e1
+  %g1 = add i64 %f, %f1
+  %h1 = add i64 %g, %g1
+  %i1 = add i64 %h, %h1
+  %j1 = add i64 %i, %i1
+  %k1 = add i64 %j, %j1
+  %l1 = add i64 %k, %k1
+  %m1 = add i64 %l, %l1
+  %n1 = add i64 %m, %m1
+  %o1 = add i64 %n, %n1
+  %p1 = add i64 %o, %o1
+  %q1 = add i64 %p, %p1
+  %r1 = add i64 %q, %q1
+  %s1 = add i64 %r, %r1
+  %t1 = add i64 %s, %s1
+  %u1 = add i64 %t, %t1
+  %v1 = add i64 %u, %u1
+  %w1 = add i64 %v, %v1
+  %x1 = add i64 %w, %w1
+  %y1 = add i64 %x, %x1
+  %z1 = add i64 %y, %y1
+  ret i64 %z1
+}
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