[llvm-commits] Deterministic finite automaton based packetizer for VLIW architectures
adasgupt at codeaurora.org
Mon Nov 28 07:13:47 PST 2011
Did anyone get a chance to take a look at the patch? Is it okay to commit?
Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
On 11/18/2011 10:51 PM, Anshuman Dasgupta wrote:
> I'm attaching a patch that adds support for a deterministic finite
> automaton (DFA) based packetizer for VLIW architectures. Specifically,
> it automatically generates a DFA from a VLIW target's Schedule.td
> file. In a VLIW machine, an instruction can typically be dispatched to
> one or many function units. The DFA determines whether there exists a
> legal mapping of instructions to functional unit assignments in a
> packet. This DFA can then be queried by a backend packetization pass
> to determine which instructions can be grouped into a VLIW packet.
> This patch contains the machine-independent code that adds a component
> to TableGen. The component autogenerates the DFA and implements the
> API that can be used to query the DFA during packetization. This can
> be used by any VLIW target to packetize its instructions. After the
> Hexagon backend is committed, I will post another Hexagon-specific
> patch that uses this mechanism to construct packets in the Hexagon
> backend. I ran the llvm test suite and this patch did not cause any
> I would appreciate reviews and comments.
> Qualcomm Innovation Center, Inc is a member of Code Aurora Forum
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
-------------- next part --------------
An HTML attachment was scrubbed...
More information about the llvm-commits