[llvm-commits] [llvm] r141500 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp

[Cameron Zwarich]

On Oct 8, 2011, at 7:21 PM, Jakob Stoklund Olesen wrote:

> On Oct 8, 2011, at 2:25 PM, Cameron Zwarich wrote:
> 
>> Could this sort of thing be checked statically?
> 
> I wish.
> 
> The 20 x86 8-bit registers are crazy. 12 can only be accessed with an REX prefix, and the 4 H-regs can only be accessed without a prefix.
> 
> Ideally, GR8_NOREX shouldn't be a sub-class of GR8, and this wouldn't be as big a problem. Unfortunately, GR8 is identical to GR8_NOREX in 32-bit mode, so TableGen considers it a super-class.
> 
> We could create separate GR8 register classes for 32-bit and 64-bit modes, but that would require duplicating instruction definitions as well.


Sounds like a good idea. We could add some metaprogramming features to Tablegen to reduce the burden of duplicating all of the instruction definitions...

Cameron