[llvm-commits] [llvm] r128748 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td test/MC/Disassembler/ARM/invalid-MOVs-arm.txt

[Johnny Chen]

Author: johnny
Date: Fri Apr  1 18:15:50 2011
New Revision: 128748

URL: http://llvm.org/viewvc/llvm-project?rev=128748&view=rev
Log:
MOVs should have Inst{19-16} as 0b0000, otherwise, the instruction is UNPREDICTABLE.

rdar://problem/9224120

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt
Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=128748&r1=128747&r2=128748&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Apr  1 18:15:50 2011
@@ -2009,6 +2009,7 @@
   bits<4> Rd;
   bits<12> src;
   let Inst{15-12} = Rd;
+  let Inst{19-16} = 0b0000;
   let Inst{11-0} = src;
   let Inst{25} = 0;
 }

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt?rev=128748&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-MOVs-arm.txt Fri Apr  1 18:15:50 2011
@@ -0,0 +1,17 @@
+# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=0 Name=PHI Format=(42)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 1| 0: 0: 0: 1| 1: 0: 1: 1| 1: 1: 0: 0| 1: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| 0: 0: 1: 0|
+# -------------------------------------------------------------------------------------------------
+# To qualify as an LSL (immediate) instruction, Inst{19-16} "should" be 0b0000, instead it is = 0b1100.
+# The instruction is UNPREDICTABLE, and is not a valid intruction.
+#
+# See also
+# A8.6.88 LSL (immediate)
+# A8.6.98 MOV (shifted register), and
+# I.1 Instruction encoding diagrams and pseudocode
+0x2 0xd1 0xbc 0xf1
+
+