[llvm-commits] [llvm] r121408 - in /llvm/trunk: include/llvm/MC/MCCodeEmitter.h lib/MC/MCAssembler.cpp lib/Target/ARM/ARMAsmBackend.cpp lib/Target/ARM/ARMMCCodeEmitter.cpp

[Bill Wendling]

On Dec 9, 2010, at 12:27 PM, Owen Anderson wrote:

> Author: resistor
> Date: Thu Dec  9 14:27:52 2010
> New Revision: 121408
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp?rev=121408&r1=121407&r2=121408&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMAsmBackend.cpp Thu Dec  9 14:27:52 2010
> @@ -100,10 +100,10 @@
>   }
>   case ARM::fixup_arm_ldst_pcrel_12:
>     // ARM PC-relative values are offset by 8.
> -    Value -= 6;
> +    Value -= 4;

Could you put a FALLTHROUGH comment here?

-bw

>   case ARM::fixup_t2_ldst_pcrel_12: {
>     // Offset by 4, adjusted by two due to the half-word ordering of thumb.
> -    Value -= 2;
> +    Value -= 4;
>     bool isAdd = true;
>     if ((int64_t)Value < 0) {
>       Value = -Value;
> 
> Modified: llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp?rev=121408&r1=121407&r2=121408&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/ARM/ARMMCCodeEmitter.cpp Thu Dec  9 14:27:52 2010
> @@ -47,7 +47,8 @@
>     const static MCFixupKindInfo Infos[] = {
>       // name                       off   bits  flags
>       { "fixup_arm_ldst_pcrel_12",  1,    24,   MCFixupKindInfo::FKF_IsPCRel },
> -      { "fixup_t2_ldst_pcrel_12",   0,    32,   MCFixupKindInfo::FKF_IsPCRel },
> +      { "fixup_t2_ldst_pcrel_12",   0,    32,   MCFixupKindInfo::FKF_IsPCRel |
> +                                                MCFixupKindInfo::FKF_IsAligned},
>       { "fixup_arm_pcrel_10",       1,    24,   MCFixupKindInfo::FKF_IsPCRel },
>       { "fixup_t2_pcrel_10",        0,    32,   MCFixupKindInfo::FKF_IsPCRel },
>       { "fixup_arm_adr_pcrel_12",   1,    24,   MCFixupKindInfo::FKF_IsPCRel },
> 
> 
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