[llvm-commits] [llvm] r108115 - in /llvm/trunk/lib: CodeGen/VirtRegRewriter.cpp Target/X86/X86InstrInfo.cpp

Rafael Espindola espindola at google.com
Sun Jul 11 20:20:46 PDT 2010


> This means that a floating point register is emergency spilled in the highest available precision which is probably exactly what you want.

That or remembering how the register was being used ....

>> Update getLoadStoreRegOpcode to handle GR32_AD.
>
> That function would be much easier to read as a switch. Compare X86FloatingPointRegKill:
>
>  switch (MRI.getRegClass(RegNo)->getID()) {
>  default: return false;
>  case X86::RFP32RegClassID:
>  case X86::RFP64RegClassID:
>  case X86::RFP80RegClassID:
>  return true;
>  }

Will give it a try.

> /jakob


Cheers,
-- 
Rafael Ávila de Espíndola




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