[llvm-commits] [llvm] r108115 - in /llvm/trunk/lib: CodeGen/VirtRegRewriter.cpp Target/X86/X86InstrInfo.cpp

[Jakob Stoklund Olesen]

On Jul 11, 2010, at 5:52 PM, Rafael Espindola wrote:

> Author: rafael
> Date: Sun Jul 11 19:52:33 2010
> New Revision: 108115
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=108115&view=rev
> Log:
> Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp to
> getMinimalPhysRegClass. It was used to produce spills, and it is better to
> use the most specific class if possible.

This means that a floating point register is emergency spilled in the highest available precision which is probably exactly what you want.

> Update getLoadStoreRegOpcode to handle GR32_AD.

That function would be much easier to read as a switch. Compare X86FloatingPointRegKill:

  switch (MRI.getRegClass(RegNo)->getID()) {
  default: return false;
  case X86::RFP32RegClassID:
  case X86::RFP64RegClassID:
  case X86::RFP80RegClassID:
  return true;
  }

/jakob

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