[llvm-commits] [llvm] r67001 - /llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

[Dan Gohman]

Author: djg
Date: Fri Mar 13 21:07:16 2009
New Revision: 67001

URL: http://llvm.org/viewvc/llvm-project?rev=67001&view=rev
Log:
Don't forego folding of loads into 64-bit adds when the other
operand is a signed 32-bit immediate. Unlike with the 8-bit
signed immediate case, it isn't actually smaller to fold a
32-bit signed immediate instead of a load. In fact, it's
larger in the case of 32-bit unsigned immediates, because
they can be materialized with movl instead of movq.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=67001&r1=67000&r2=67001&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Fri Mar 13 21:07:16 2009
@@ -319,16 +319,9 @@
       // addl 4(%esp), %eax
       // The former is 2 bytes shorter. In case where the increment is 1, then
       // the saving can be 4 bytes (by using incl %eax).
-      ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(U->getOperand(1));
-      if (Imm) {
-        if (U->getValueType(0) == MVT::i64) {
-          if ((int32_t)Imm->getZExtValue() == (int64_t)Imm->getZExtValue())
-            return false;
-        } else {
-          if ((int8_t)Imm->getZExtValue() == (int64_t)Imm->getZExtValue())
-            return false;
-        }
-      }
+      if (ConstantSDNode *Imm = dyn_cast<ConstantSDNode>(U->getOperand(1)))
+        if (Imm->getAPIntValue().isSignedIntN(8))
+          return false;
     }
     }