[llvm-commits] [llvm] r61603 - in /llvm/trunk/lib/Target/X86: X86.td X86Subtarget.cpp

[Török Edwin]

On 2009-01-03 06:24, Evan Cheng wrote:
> Author: evancheng
> Date: Fri Jan  2 22:24:44 2009
> New Revision: 61603
>
> URL: http://llvm.org/viewvc/llvm-project?rev=61603&view=rev
> Log:
> Add Intel processors core i7 and atom.
>   

Please see http://llvm.org/bugs/show_bug.cgi?id=3210#c8
I think the Intel CPUID tables are wrong about i7 and atom sharing model
number, the individual datasheets
say something else.

Here is a patch to fix this:

Index: lib/Target/X86/X86Subtarget.cpp
===================================================================
--- lib/Target/X86/X86Subtarget.cpp     (revision 61604)
+++ lib/Target/X86/X86Subtarget.cpp     (working copy)
@@ -252,10 +252,14 @@
         case 4:
         case 6: // same as 4, but 65nm
           return (Em64T) ? "nocona" : "prescott";
+       case 26:
+         // According to the core i7's datasheet it has model 26.
+         // Apparently the CPUID table is wrong in saying it has model 28.
+         // Core i7 has SSE4.2
+         return "corei7";
         case 28:
-          // Intel Atom, and Core i7 both have this model.
-          // Atom has SSSE3, Core i7 has SSE4.2
-          return (HasSSE42) ? "corei7" : "atom";
+          // Atom has SSSE3
+          return "atom";
         default:
           return (Em64T) ? "x86-64" : "pentium4";
         }