[llvm-commits] [llvm] r58871 - in /llvm/trunk/lib: CodeGen/SelectionDAG/LegalizeDAG.cpp Target/PowerPC/PPCISelDAGToDAG.cpp Target/PowerPC/PPCISelLowering.cpp
Daniel Dunbar
daniel at zuster.org
Fri Nov 7 15:33:49 PST 2008
This appears to be causing failures on linux? See
http://google1.osuosl.org:8011/builders/llvm-x86_64-linux/builds/186
and
http://google1.osuosl.org:8011/builders/llvm-i686-linux/builds/85
- Daniel
On Fri, Nov 7, 2008 at 2:54 PM, Dale Johannesen <dalej at apple.com> wrote:
> Author: johannes
> Date: Fri Nov 7 16:54:33 2008
> New Revision: 58871
>
> URL: http://llvm.org/viewvc/llvm-project?rev=58871&view=rev
> Log:
> Make FP tests requiring two compares work on PPC (PR 642).
> This is Chris' patch from the PR, modified to realize that
> SETUGT/SETULT occur legitimately with integers, plus
> two fixes in LegalizeDAG to pass a valid result type into
> LegalizeSetCC. The argument of TLI.getSetCCResultType is
> ignored on PPC, but I think I'm following usage elsewhere.
>
>
> Modified:
> llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
> llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
>
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=58871&r1=58870&r2=58871&view=diff
>
>
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Fri Nov 7 16:54:33
> 2008
> @@ -2008,7 +2008,7 @@
> Tmp3 = Node->getOperand(3); // RHS
> Tmp4 = Node->getOperand(1); // CC
>
> - LegalizeSetCC(Node->getValueType(0), Tmp2, Tmp3, Tmp4);
> + LegalizeSetCC(TLI.getSetCCResultType(Tmp2), Tmp2, Tmp3, Tmp4);
> LastCALLSEQ_END = DAG.getEntryNode();
>
> // If we didn't get both a LHS and RHS back from LegalizeSetCC,
> @@ -2910,7 +2910,7 @@
> Tmp4 = LegalizeOp(Node->getOperand(3)); // False
> SDValue CC = Node->getOperand(4);
>
> - LegalizeSetCC(Node->getValueType(0), Tmp1, Tmp2, CC);
> + LegalizeSetCC(TLI.getSetCCResultType(Tmp1), Tmp1, Tmp2, CC);
>
> // If we didn't get both a LHS and RHS back from LegalizeSetCC,
> // the LHS is a legal SETCC itself. In this case, we need to compare
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp?rev=58871&r1=58870&r2=58871&view=diff
>
>
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCISelDAGToDAG.cpp Fri Nov 7 16:54:33
> 2008
> @@ -587,28 +587,29 @@
>
> static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC) {
> switch (CC) {
> - default: assert(0 && "Unknown condition!"); abort();
> - case ISD::SETOEQ: // FIXME: This is incorrect see PR642.
> case ISD::SETUEQ:
> + case ISD::SETONE:
> + case ISD::SETOLE:
> + case ISD::SETOGE:
> + assert(0 && "Should be lowered by legalize!");
> + default: assert(0 && "Unknown condition!"); abort();
> + case ISD::SETOEQ:
> case ISD::SETEQ: return PPC::PRED_EQ;
> - case ISD::SETONE: // FIXME: This is incorrect see PR642.
> case ISD::SETUNE:
> case ISD::SETNE: return PPC::PRED_NE;
> - case ISD::SETOLT: // FIXME: This is incorrect see PR642.
> - case ISD::SETULT:
> + case ISD::SETOLT:
> case ISD::SETLT: return PPC::PRED_LT;
> - case ISD::SETOLE: // FIXME: This is incorrect see PR642.
> case ISD::SETULE:
> case ISD::SETLE: return PPC::PRED_LE;
> - case ISD::SETOGT: // FIXME: This is incorrect see PR642.
> - case ISD::SETUGT:
> + case ISD::SETOGT:
> case ISD::SETGT: return PPC::PRED_GT;
> - case ISD::SETOGE: // FIXME: This is incorrect see PR642.
> case ISD::SETUGE:
> case ISD::SETGE: return PPC::PRED_GE;
> -
> case ISD::SETO: return PPC::PRED_NU;
> case ISD::SETUO: return PPC::PRED_UN;
> + // These two are invalid for floating point. Assume we have int.
> + case ISD::SETULT: return PPC::PRED_LT;
> + case ISD::SETUGT: return PPC::PRED_GT;
> }
> }
>
> @@ -637,12 +638,14 @@
> case ISD::SETUNE:
> case ISD::SETNE: Invert = true; return 2; // !Bit #2 = SETUNE
> case ISD::SETO: Invert = true; return 3; // !Bit #3 = SETO
> - case ISD::SETULT: Other = 0; return 3; // SETOLT | SETUO
> - case ISD::SETUGT: Other = 1; return 3; // SETOGT | SETUO
> - case ISD::SETUEQ: Other = 2; return 3; // SETOEQ | SETUO
> - case ISD::SETOGE: Other = 1; return 2; // SETOGT | SETOEQ
> - case ISD::SETOLE: Other = 0; return 2; // SETOLT | SETOEQ
> - case ISD::SETONE: Other = 0; return 1; // SETOLT | SETOGT
> + case ISD::SETUEQ:
> + case ISD::SETOGE:
> + case ISD::SETOLE:
> + case ISD::SETONE:
> + assert(0 && "Invalid branch code: should be expanded by legalize");
> + // These are invalid for floating point. Assume integer.
> + case ISD::SETULT: return 0;
> + case ISD::SETUGT: return 1;
> }
> return 0;
> }
>
> Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=58871&r1=58870&r2=58871&view=diff
>
>
> ==============================================================================
> --- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
> +++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri Nov 7 16:54:33
> 2008
> @@ -209,6 +209,20 @@
> // We want to custom lower some of our intrinsics.
> setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
>
> + // Comparisons that require checking two conditions.
> + setCondCodeAction(ISD::SETULT, MVT::f32, Expand);
> + setCondCodeAction(ISD::SETULT, MVT::f64, Expand);
> + setCondCodeAction(ISD::SETUGT, MVT::f32, Expand);
> + setCondCodeAction(ISD::SETUGT, MVT::f64, Expand);
> + setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
> + setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
> + setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
> + setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
> + setCondCodeAction(ISD::SETOLE, MVT::f32, Expand);
> + setCondCodeAction(ISD::SETOLE, MVT::f64, Expand);
> + setCondCodeAction(ISD::SETONE, MVT::f32, Expand);
> + setCondCodeAction(ISD::SETONE, MVT::f64, Expand);
> +
> if (TM.getSubtarget<PPCSubtarget>().has64BitSupport()) {
> // They also have instructions for converting between i64 and fp.
> setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
>
>
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