[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

[Jim Laskey]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAG.cpp updated: 1.23 -> 1.24
---
Log message:

Remove some redundancies.


---
Diffs of the changes:  (+10 -10)

 ScheduleDAG.cpp |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.23 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.24
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.23	Mon Sep 26 16:57:04 2005
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp	Tue Sep 27 12:32:45 2005
@@ -197,7 +197,6 @@
   SDOperand     Op;                     // Operand information
   unsigned      Latency;                // Cycles to complete instruction
   unsigned      ResourceSet;            // Bit vector of usable resources
-  bool          IsBoundary;             // Do not shift passed this instruction.
   unsigned      Slot;                   // Operand's time slot
   
   // Ctor.
@@ -205,7 +204,6 @@
   : Op(op)
   , Latency(0)
   , ResourceSet(0)
-  , IsBoundary(false)
   , Slot(0)
   {}
 };
@@ -452,10 +450,10 @@
       MachineOpCode TOpc = Op.getTargetOpcode();
       // FIXME SI->Latency = std::max(1, TII.maxLatency(TOpc));
       // FIXME SI->ResourceSet = TII.resources(TOpc);
-      // There is a cost for keeping values across a call.
-      SI->IsBoundary = TII.isCall(TOpc);
-      
-      if (TII.isLoad(TOpc)) {
+      if (TII.isCall(TOpc)) {
+        SI->ResourceSet = RSInteger;
+        SI->Latency = 40;
+      } else if (TII.isLoad(TOpc)) {
         SI->ResourceSet = RSLoadStore;
         SI->Latency = 5;
       } else if (TII.isStore(TOpc)) {
@@ -526,7 +524,11 @@
 /// conflict with operands of B.
 bool SimpleSched::isWeakDependency(SDNode *A, SDNode *B) {
   // TODO check for conflicting real registers and aliases
+#if 0 // Since we are in SSA form and not checking register aliasing
   return A->getOpcode() == ISD::EntryToken || isStrongDependency(B, A);
+#else
+  return A->getOpcode() == ISD::EntryToken;
+#endif
 }
 
 /// ScheduleBackward - Schedule instructions so that any long latency
@@ -554,8 +556,7 @@
       if (isStrongDependency(SI->Op, Other->Op)) {
         Slot = Other->Slot + Other->Latency;
         break;
-      } else if (SI->IsBoundary || Other->IsBoundary ||
-                 isWeakDependency(SI->Op, Other->Op)) {
+      } else if (isWeakDependency(SI->Op, Other->Op)) {
         Slot = Other->Slot;
         break;
       }
@@ -609,8 +610,7 @@
       if (isStrongDependency(Other->Op, SI->Op)) {
         Slot = Other->Slot + Other->Latency;
         break;
-      } else if (SI->IsBoundary || Other->IsBoundary ||
-                 isWeakDependency(Other->Op, SI->Op)) {
+      } else if (isWeakDependency(Other->Op, SI->Op)) {
         Slot = Other->Slot;
         break;
       }