[llvm-bugs] [Bug 48322] New: Compilation failure of MSAN-instrumented _mm512_shuffle_ps

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=48322

            Bug ID: 48322
           Summary: Compilation failure of MSAN-instrumented
                    _mm512_shuffle_ps
           Product: libraries
           Version: trunk
          Hardware: PC
               URL: https://github.com/rust-lang/stdarch/issues/957
                OS: Linux
            Status: NEW
          Keywords: Sanitizer
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: g2p.code at gmail.com
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
                    llvm-dev at redking.me.uk, pengfei.wang at intel.com,
                    spatel+llvm at rotateright.com

Report via
https://github.com/rust-lang/stdarch/issues/957#issuecomment-735223507

#include <immintrin.h>

__m512 test_mm512_shuffle_ps(__m512 __M, __m512 __V) {
  return _mm512_shuffle_ps(__M, __V, 78); 
}

$ clang -cc1 -target-feature +avx512f -ffreestanding -triple
x86_64-unknown-linux-gnu -x c a.c -internal-isystem
/usr/lib64/clang/11.0.0/include -S -emit-obj -fsanitize=memory
clang: llvm/lib/Target/X86/X86ISelLowering.cpp:12493: llvm::SDValue
lowerShuffleAsByteRotate(const llvm::SDLoc&, llvm::MVT, llvm::SDValue,
llvm::SDValue, llvm::ArrayRef<int>, const llvm::X86Subtarget&,
llvm::SelectionDAG&): Assertion `(!VT.is512BitVector() || Subtarget.hasBWI())
&& "512-bit PALIGNR requires BWI instructions"' failed.

Reduced:

; ModuleID = 'a.c'
source_filename = "a.c"
target datalayout =
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

; Function Attrs: norecurse nounwind readnone
define <16 x i32> @shuffle(<16 x i32> %a, <16 x i32> %b) local_unnamed_addr #0
{
entry:
  %c = shufflevector <16 x i32> %a, <16 x i32> %b, <16 x i32> <i32 2, i32 3,
i32 16, i32 17, i32 6, i32 7, i32 20, i32 21, i32 10, i32 11, i32 24, i32 25,
i32 14, i32 15, i32 28, i32 29>
  ret <16 x i32> %c
}

attributes #0 = { norecurse nounwind readnone "disable-tail-calls"="false"
"frame-pointer"="none" "less-precise-fpmad"="false"
"min-legal-vector-width"="512" "no-builtins" "no-infs-fp-math"="false"
"no-jump-tables"="false" "no-nans-fp-math"="false"
"no-signed-zeros-fp-math"="false" "no-trapping-math"="true"
"stack-protector-buffer-size"="8"
"target-features"="+avx,+avx2,+avx512f,+cx8,+f16c,+fma,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"
"unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}
!llvm.ident = !{!1}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project
530c69e90964444bc916d38b337105ab44f0961b)"}

$ llc a.ll
llc: llvm/lib/Target/X86/X86ISelLowering.cpp:12493: llvm::SDValue
lowerShuffleAsByteRotate(const llvm::SDLoc&, llvm::MVT, llvm::SDValue,
llvm::SDValue, llvm::ArrayRef<int>, const llvm::X86Subtarget&,
llvm::SelectionDAG&): Assertion `(!VT.is512BitVector() || Subtarget.hasBWI())
&& "512-bit PALIGNR requires BWI instructions"' failed.

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