[llvm-bugs] [Bug 45175] New: [Machinepipeliner] Bug in creating AdjacencyStructure for multiple Output dependence chains

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https://bugs.llvm.org/show_bug.cgi?id=45175

            Bug ID: 45175
           Summary: [Machinepipeliner] Bug in creating AdjacencyStructure
                    for multiple Output dependence chains
           Product: clang
           Version: trunk
          Hardware: Other
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: LLVM Codegen
          Assignee: unassignedclangbugs at nondot.org
          Reporter: lama.saba at intel.com
                CC: llvm-bugs at lists.llvm.org, neeilans at live.com,
                    richard-llvm at metafoo.co.uk

The code creating a back-edge on the first and last nodes of a dependence chain
in createAdjacencyStructure: 

    // Add any successor to the adjacency matrix and exclude duplicates.
    for (auto &SI : SUnits[i].Succs) {
      // Only create a back-edge on the first and last nodes of a dependence
      // chain. This records any chains and adds them later.
      if (SI.getKind() == SDep::Output) {
        int N = SI.getSUnit()->NodeNum;
        int BackEdge = i;
        auto Dep = OutputDeps.find(BackEdge);
        if (Dep != OutputDeps.end()) {
          BackEdge = Dep->second;
          OutputDeps.erase(Dep);
        }
        OutputDeps[N] = BackEdge;
      }

generates incorrect code for cases where there are more than one Output def in
the nodeset.

for example: 

1) out1 = inst1..
2) out1 = inst2..
3) out1 = inst3..
4) out1 = inst4..

this will correctly add a back-edge from 4 to 1

but when there are 2 defs

1) out1,out2 = inst1..
2) out1,out2 = inst2..
3) out1,out2 = inst3..
4) out1,out2 = inst4..

it will add a backedge from 4 to 3, thus creating wrong recurrence node sets.
The code should generate a separate chain for each def.

unfortunately, I cou;dn't generate Hexagon/Power PC tests for this case.

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