[llvm-bugs] [Bug 46934] New: Suboptimal instruction schedule leads to spilling and poor performance

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=46934

            Bug ID: 46934
           Summary: Suboptimal instruction schedule leads to spilling and
                    poor performance
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Register Allocator
          Assignee: unassignedbugs at nondot.org
          Reporter: benny.kra at gmail.com
                CC: echristo at gmail.com, llvm-bugs at lists.llvm.org,
                    ntv at google.com, quentin.colombet at gmail.com

Created attachment 23801
  --> https://bugs.llvm.org/attachment.cgi?id=23801&action=edit
test case

When looking at a matmul benchmark we're seeing steep performance cliffs after
tiny changes to the IR. This seems to be due to excessive spilling.

$ llc -mcpu=skx < matmul.ll | grep -c Spill
13

Picking a different scheduler can make this go away. I think it's just getting
lucky though:
$ llc -mcpu=skx < matmul.ll -pre-RA-sched=list-ilp | grep -c Spill
1

The input contains a loop with lots of loads, followed by arithmetic. It is
possible to move some of the loads down into the arithmetic to reduce register
pressure.

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