[llvm-bugs] [Bug 47207] New: "make compiler-rt"

via llvm-bugs llvm-bugs at lists.llvm.org
Mon Aug 17 07:46:52 PDT 2020


https://bugs.llvm.org/show_bug.cgi?id=47207

            Bug ID: 47207
           Summary: "make compiler-rt"
           Product: compiler-rt
           Version: unspecified
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: compiler-rt
          Assignee: unassignedbugs at nondot.org
          Reporter: abaelhe at icloud.com
                CC: llvm-bugs at lists.llvm.org

clang-10: note: diagnostic msg: 
********************

PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
Preprocessed source(s) and associated run script(s) are located at:
clang-10: note: diagnostic msg:
/var/folders/6g/v9_bp8fj7nsd9p1c75q7q5kw0000gn/T/adddf3-e3c87a.c
clang-10: note: diagnostic msg:
/var/folders/6g/v9_bp8fj7nsd9p1c75q7q5kw0000gn/T/adddf3-e3c87a.sh
clang-10: note: diagnostic msg: Crash backtrace is located in
clang-10: note: diagnostic msg:
/Users/abaelhe/Library/Logs/DiagnosticReports/clang-10_<YYYY-MM-DD-HHMMSS>_<hostname>.crash
clang-10: note: diagnostic msg: (choose the .crash file that corresponds to
your crash)
clang-10: note: diagnostic msg: 

********************
make[5]: *** [lib/builtins/CMakeFiles/clang_rt.cc_kext_i386_osx.dir/adddf3.c.o]
Error 70
make[5]: *** Waiting for unfinished jobs....
[ 73%] Building C object
lib/builtins/CMakeFiles/clang_rt.cc_kext_i386_osx.dir/divdf3.c.o
[ 73%] Building C object
lib/profile/CMakeFiles/clang_rt.profile_osx.dir/InstrProfilingFile.c.o
[ 73%] Building CXX object lib/xray/CMakeFiles/RTXray.osx.dir/xray_init.cpp.o
clang-10: note: diagnostic msg: 
********************

PLEASE ATTACH THE FOLLOWING FILES TO THE BUG REPORT:
Preprocessed source(s) and associated run script(s) are located at:
clang-10: note: diagnostic msg:
/var/folders/6g/v9_bp8fj7nsd9p1c75q7q5kw0000gn/T/adddf3-8c0e04.c
clang-10: note: diagnostic msg:
/var/folders/6g/v9_bp8fj7nsd9p1c75q7q5kw0000gn/T/adddf3-8c0e04.sh
clang-10: note: diagnostic msg: Crash backtrace is located in
clang-10: note: diagnostic msg:
/Users/abaelhe/Library/Logs/DiagnosticReports/clang-10_<YYYY-MM-DD-HHMMSS>_<hostname>.crash
clang-10: note: diagnostic msg: (choose the .crash file that corresponds to
your crash)
clang-10: note: diagnostic msg: 

********************
make[5]: ***
[lib/builtins/CMakeFiles/clang_rt.builtins_i386_osx.dir/adddf3.c.o] Error 70
make[5]: *** Waiting for unfinished jobs....

############################################################################
MORE:
[ 71%] Building CXX object
lib/xray/CMakeFiles/RTXrayFDR.osx.dir/xray_fdr_flags.cpp.o
[ 72%] Building C object
lib/builtins/CMakeFiles/clang_rt.builtins_i386_osx.dir/ctzsi2.c.o
[ 72%] Building CXX object
lib/sanitizer_common/CMakeFiles/RTSanitizerCommonNoHooks.osx.dir/sanitizer_common.cpp.o

# After Simple Register Coalescing
********** INTERVALS **********
%0
[80r,720B:0)[896B,1008B:0)[1184B,1392r:0)[1392r,1488r:2)[1488r,1520r:3)[1520r,1520d:4)[1712B,1808B:0)[1856B,1936B:0)[2240B,4384r:0)[4384r,5760B:1)[5824B,7120r:1)
 0 at 80r 1 at 4384r 2 at 1392r 3 at 1488r 4 at 1520r weight:0.000000e+00
%1
[64r,720B:0)[896B,1008B:0)[1184B,1424r:0)[1424r,1456r:2)[1456r,1520r:3)[1712B,1808B:0)[1856B,1936B:0)[2240B,4416r:0)[4416r,5760B:1)[5824B,7152r:1)
 0 at 64r 1 at 4416r 2 at 1424r 3 at 1456r weight:0.000000e+00
%3
[96r,720B:0)[896B,1008B:0)[1184B,1296B:0)[1712B,1808B:0)[1856B,1936B:0)[2240B,5760B:0)[5824B,7248r:0)
 0 at 96r weight:0.000000e+00
%7
[192r,720B:0)[896B,1040r:0)[1040r,1072r:2)[1184B,1360r:0)[1360r,1456r:1)[1712B,1808B:0)[1856B,2064r:0)[2064r,2128r:3)[2240B,2512r:0)
 0 at 192r 1 at 1360r 2 at 1040r 3 at 2064r weight:0.000000e+00
%9
[208r,224r:0)[224r,720B:1)[896B,1008B:1)[1184B,1296B:1)[1712B,1808B:1)[1856B,1936B:1)[2240B,2384r:1)[2384r,2384d:2)
 0 at 208r 1 at 224r 2 at 2384r weight:0.000000e+00
%10
[176r,720B:0)[896B,1056r:0)[1184B,1328r:0)[1328r,1488r:1)[1712B,1808B:0)[1856B,2096r:0)[2096r,2112r:2)[2240B,2480r:0)
 0 at 176r 1 at 1328r 2 at 2096r weight:0.000000e+00
%11
[240r,256r:0)[256r,720B:1)[896B,1008B:1)[1184B,1296B:1)[1712B,1808B:1)[1856B,1968r:1)[1968r,1968d:2)[2240B,2384r:1)
 0 at 240r 1 at 256r 2 at 1968r weight:0.000000e+00
%16 [7424r,8368r:0)  0 at 7424r weight:0.000000e+00
%17 [7408r,8432r:0)  0 at 7408r weight:0.000000e+00
%36
[2528r,2544r:9)[2544r,2672r:3)[2672r,2784B:1)[3344r,3376r:11)[3376r,3440B:2)[3440B,5760B:0)[5824B,6544r:0)[6544r,6624B:5)[6624B,6976r:0)[6976r,7040B:4)[7040B,7216B:6)[7392B,7920r:6)[8208r,8224B:7)[8224B,8464r:8)[8464r,8560r:10)
 0 at 3440B-phi 1 at 2672r 2 at 3376r 3 at 2544r 4 at 6976r 5 at 6544r 6 at 7040B-phi 7 at 8208r
8 at 8224B-phi 9 at 2528r 10 at 8464r 11 at 3344r weight:0.000000e+00
%40 [4112r,4192r:0)  0 at 4112r weight:0.000000e+00
%47 [5840r,5856r:0)  0 at 5840r weight:0.000000e+00
%48
[128r,768r:2)[896B,1008B:2)[1184B,1328r:2)[1712B,1808B:2)[1856B,2096r:2)[2240B,2480r:2)[2480r,5760B:0)[5824B,7120r:0)[7120r,7280r:1)[7392B,8752B:1)[9280B,9312r:1)[9312r,9312d:3)[9536B,9568r:1)[9568r,9568d:4)
 0 at 2480r 1 at 7120r 2 at 128r 3 at 9312r 4 at 9568r weight:0.000000e+00
%49
[144r,752r:2)[752r,784r:3)[896B,1008B:2)[1184B,1360r:2)[1712B,1808B:2)[1856B,2064r:2)[2240B,2512r:2)[2512r,5760B:0)[5824B,7152r:0)[7152r,7248r:1)[7248r,7264r:4)[7392B,8752B:1)[9280B,9312r:1)[9536B,9568r:1)
 0 at 2512r 1 at 7152r 2 at 144r 3 at 752r 4 at 7248r weight:0.000000e+00
%51 [2432r,2448r:2)[2448r,4448r:0)[4448r,5584r:1)  0 at 2448r 1 at 4448r 2 at 2432r
weight:0.000000e+00
%52
[2720r,2784B:2)[3248r,3328r:5)[3328r,3440B:3)[3440B,5536r:0)[5536r,5664r:1)[5664r,5760B:4)[5824B,5904r:4)[5968B,6416r:4)[6416r,6512r:6)[6624B,6656r:1)
 0 at 3440B-phi 1 at 5536r 2 at 2720r 3 at 3328r 4 at 5664r 5 at 3248r 6 at 6416r
weight:0.000000e+00
%53
[2624r,2640r:6)[2640r,3184r:3)[3184r,3296r:7)[3296r,3440B:4)[3440B,4480r:2)[4480r,5568r:0)[5568r,5696r:1)[5696r,5760B:5)[5824B,5920r:5)[5968B,6368r:5)[6368r,6480r:8)[6480r,6576r:9)[6624B,6688r:1)
 0 at 4480r 1 at 5568r 2 at 3440B-phi 3 at 2640r 4 at 3296r 5 at 5696r 6 at 2624r 7 at 3184r 8 at 6368r
9 at 6480r weight:0.000000e+00
%56 [4592r,4608r:0)[4608r,4640B:1)[4704B,4752B:1)[4848B,5296r:1)  0 at 4592r
1 at 4608r weight:0.000000e+00
%57 [5136r,5184r:0)[5184r,5424r:1)  0 at 5136r 1 at 5184r weight:0.000000e+00
%78 [7824r,7872r:0)[7872r,8160r:1)  0 at 7824r 1 at 7872r weight:0.000000e+00
%84
[8288r,8304r:10)[8304r,8368r:9)[8368r,8496r:0)[8496r,8976r:1)[8976r,9184r:2)[9184r,9280B:6)[9280B,9440r:1)[9440r,9536B:4)[9536B,9696r:1)[9696r,9776B:3)[9776B,9936B:5)[9936B,10064B:7)[10064B,10112r:8)
 0 at 8368r 1 at 8496r 2 at 8976r 3 at 9696r 4 at 9440r 5 at 9776B-phi 6 at 9184r 7 at 9936B-phi
8 at 10064B-phi 9 at 8304r 10 at 8288r weight:0.000000e+00
%88 [9136r,9152r:2)[9152r,9184r:0)  0 at 9152r 1 at x 2 at 9136r weight:0.000000e+00
%102
[48r,720B:0)[896B,1008B:0)[1184B,1552B:0)[1568r,1616B:1)[1616B,1648B:0)[1648B,1680r:2)[1712B,1808B:0)[1856B,1936B:0)[2240B,2288r:0)
 0 at 48r 1 at 1568r 2 at 1648B-phi weight:0.000000e+00
%104 [352r,368r:0)[368r,528r:1)  0 at 352r 1 at 368r weight:0.000000e+00
%105 [384r,400r:0)[400r,560r:1)  0 at 384r 1 at 400r weight:0.000000e+00
%106 [416r,528r:0)  0 at 416r weight:0.000000e+00
%108 [272r,288r:0)[288r,432r:1)  0 at 272r 1 at 288r weight:0.000000e+00
%109 [304r,320r:0)[320r,464r:1)  0 at 304r 1 at 320r weight:0.000000e+00
%111 [448r,464r:0)[464r,464d:1)  0 at 448r 1 at 464r weight:0.000000e+00
%113 [336r,560r:0)[560r,560d:1)  0 at 336r 1 at 560r weight:0.000000e+00
%114 [624r,640r:0)[640r,640d:1)  0 at 624r 1 at 640r weight:0.000000e+00
%115 [656r,672r:0)[672r,672d:1)  0 at 656r 1 at 672r weight:0.000000e+00
%116 [912r,928r:0)[928r,928d:1)  0 at 912r 1 at 928r weight:0.000000e+00
%117 [944r,960r:0)[960r,960d:1)  0 at 944r 1 at 960r weight:0.000000e+00
%119 [1200r,1216r:2)[1216r,1248r:0)[1248r,1248d:1)  0 at 1216r 1 at 1248r 2 at 1200r
weight:0.000000e+00
%121 [1728r,1744r:2)[1744r,1776r:0)[1776r,1776d:1)  0 at 1744r 1 at 1776r 2 at 1728r
weight:0.000000e+00
%122 [1872r,1888r:0)[1888r,1888d:1)  0 at 1872r 1 at 1888r weight:0.000000e+00
%123 [2256r,2272r:0)[2272r,2272d:1)  0 at 2256r 1 at 2272r weight:0.000000e+00
%133 [3120r,3136r:0)[3136r,3264r:1)  0 at 3120r 1 at 3136r weight:0.000000e+00
%135 [3216r,3232r:0)[3232r,3328r:1)  0 at 3216r 1 at 3232r weight:0.000000e+00
%143 [3984r,4000r:0)[4000r,4128r:1)  0 at 3984r 1 at 4000r weight:0.000000e+00
%158 [4896r,4928r:0)[4928r,5056r:1)  0 at 4896r 1 at 4928r weight:0.000000e+00
%161 [5040r,5360r:0)  0 at 5040r weight:0.000000e+00
%162 [4960r,4976r:2)[4976r,5088r:0)[5088r,5168r:1)  0 at 4976r 1 at 5088r 2 at 4960r
weight:0.000000e+00
%163 [5008r,5024r:2)[5024r,5120r:0)[5120r,5168r:1)[5168r,5168d:3)  0 at 5024r
1 at 5120r 2 at 5008r 3 at 5168r weight:0.000000e+00
%171 [6832r,6848r:0)[6848r,6912r:1)  0 at 6832r 1 at 6848r weight:0.000000e+00
%173 [5712r,5728r:0)[5728r,5728d:1)  0 at 5712r 1 at 5728r weight:0.000000e+00
%185 [7728r,8096r:0)  0 at 7728r weight:0.000000e+00
%188 [7600r,7616r:0)[7616r,7744r:1)  0 at 7600r 1 at 7616r weight:0.000000e+00
%191 [7648r,7664r:2)[7664r,7776r:0)[7776r,7856r:1)  0 at 7664r 1 at 7776r 2 at 7648r
weight:0.000000e+00
%192 [7696r,7712r:2)[7712r,7808r:0)[7808r,7856r:1)[7856r,7856d:3)  0 at 7712r
1 at 7808r 2 at 7696r 3 at 7856r weight:0.000000e+00
%196 [7888r,7920r:0)[7920r,8032r:1)  0 at 7888r 1 at 7920r weight:0.000000e+00
%208 [8624r,8768r:0)  0 at 8624r weight:0.000000e+00
%212 [9584r,9648r:0)  0 at 9584r weight:0.000000e+00
%214 [9616r,9648r:0)[9648r,9664r:1)  0 at 9616r 1 at 9648r weight:0.000000e+00
%215 [9664r,9696r:0)  0 at 9664r weight:0.000000e+00
%217 [9328r,9392r:0)  0 at 9328r weight:0.000000e+00
%219 [9360r,9392r:0)[9392r,9408r:1)  0 at 9360r 1 at 9392r weight:0.000000e+00
%220 [9408r,9440r:0)  0 at 9408r weight:0.000000e+00
%228 [10128r,10160r:0)  0 at 10128r weight:0.000000e+00
%232 [7264r,7312r:0)  0 at 7264r weight:0.000000e+00
%240 [2128r,2160r:0)  0 at 2128r weight:0.000000e+00
%243 [16r,720B:0)[896B,1008B:0)[1184B,1568r:0)  0 at 16r weight:0.000000e+00
%254 [1072r,1104r:0)  0 at 1072r weight:0.000000e+00
%259 [784r,816r:0)  0 at 784r weight:0.000000e+00
%262 [10272r,10288r:0)  0 at 10272r weight:0.000000e+00
%268 [8880r,8912r:0)[8912r,8976r:1)  0 at 8880r 1 at 8912r weight:0.000000e+00
%270
[2864r,2896r:3)[2896r,2944B:1)[2960r,2992r:5)[2992r,3024r:4)[3024r,3056B:0)[3056B,3376r:2)
 0 at 3024r 1 at 2896r 2 at 3056B-phi 3 at 2864r 4 at 2992r 5 at 2960r weight:0.000000e+00
%274
[3728r,3760r:3)[3760r,3808B:1)[3824r,3856r:5)[3856r,3888r:4)[3888r,3920B:0)[3920B,4240r:2)
 0 at 3888r 1 at 3760r 2 at 3920B-phi 3 at 3728r 4 at 3856r 5 at 3824r weight:0.000000e+00
%277
[2560r,2576r:4)[2576r,2608r:3)[2608r,3648B:0)[4208r,4240r:5)[4240r,4304B:1)[4304B,4608r:2)
 0 at 2608r 1 at 4240r 2 at 4304B-phi 3 at 2576r 4 at 2560r 5 at 4208r weight:0.000000e+00
%278
[2400r,2416r:14)[2416r,4096r:12)[4096r,4192r:16)[4192r,4304B:13)[4304B,4544r:5)[4544r,4752B:0)[4784r,4848B:1)[4848B,5232r:0)[5232r,5328r:18)[5328r,5424r:19)[5424r,5472B:2)[5472B,5664r:3)[5904r,5968B:7)[6432r,6512r:17)[6512r,6624B:8)[6624B,6656r:3)[6656r,6880r:4)[6880r,6912r:20)[6912r,7040B:6)[7040B,7216B:9)[7392B,7968r:9)[7968r,8064r:21)[8064r,8160r:22)[8160r,8224B:10)[8224B,8336r:11)[8336r,9120B:15)[9280B,9824r:15)
 0 at 4544r 1 at 4784r 2 at 5424r 3 at 5472B-phi 4 at 6656r 5 at 4304B-phi 6 at 6912r 7 at 5904r
8 at 6512r 9 at 7040B-phi 10 at 8160r 11 at 8224B-phi 12 at 2416r 13 at 4192r 14 at 2400r 15 at 8336r
16 at 4096r 17 at 6432r 18 at 5232r 19 at 5328r 20 at 6880r 21 at 7968r 22 at 8064r
weight:0.000000e+00
%279
[3504r,3520r:15)[3520r,4048r:12)[4048r,4160r:27)[4160r,4304B:13)[4304B,4512r:14)[4512r,4576r:5)[4576r,4752B:0)[4768r,4848B:1)[4848B,5280r:0)[5280r,5360r:28)[5360r,5472B:2)[5472B,5696r:3)[5920r,5968B:7)[6576r,6624B:8)[6624B,6688r:3)[6688r,6944r:4)[6944r,7040B:6)[7040B,7216B:9)[7392B,8016r:9)[8016r,8096r:29)[8096r,8224B:10)[8224B,8400r:11)[8400r,8432r:16)[8432r,8528r:17)[8528r,8560r:18)[8560r,9008r:19)[9008r,9216r:20)[9216r,9280B:24)[9280B,9472r:19)[9472r,9536B:22)[9536B,9728r:19)[9728r,9776B:21)[9776B,9936B:23)[9936B,10064B:25)[10064B,10128r:26)
 0 at 4576r 1 at 4768r 2 at 5360r 3 at 5472B-phi 4 at 6688r 5 at 4512r 6 at 6944r 7 at 5920r 8 at 6576r
9 at 7040B-phi 10 at 8096r 11 at 8224B-phi 12 at 3520r 13 at 4160r 14 at 4304B-phi 15 at 3504r
16 at 8400r 17 at 8432r 18 at 8528r 19 at 8560r 20 at 9008r 21 at 9728r 22 at 9472r 23 at 9776B-phi
24 at 9216r 25 at 9936B-phi 26 at 10064B-phi 27 at 4048r 28 at 5280r 29 at 8016r
weight:0.000000e+00
%280
[6048r,6080r:4)[6080r,6128B:1)[6144r,6176r:6)[6176r,6208r:5)[6208r,6240B:0)[6240B,6288r:2)[6288r,6544r:3)
 0 at 6208r 1 at 6080r 2 at 6240B-phi 3 at 6288r 4 at 6048r 5 at 6176r 6 at 6144r
weight:0.000000e+00
%293
[32r,720B:0)[768r,816r:11)[816r,896B:8)[896B,1008B:0)[1056r,1104r:12)[1104r,1184B:7)[1184B,1296B:0)[1680r,1712B:6)[1712B,2032B:0)[2112r,2160r:13)[2160r,2240B:5)[2288r,2336B:1)[5776r,5824B:2)[7280r,7312r:14)[7312r,7392B:4)[10112r,10160r:10)[10160r,10224B:3)[10224B,10256r:9)
 0 at 32r 1 at 2288r 2 at 5776r 3 at 10160r 4 at 7312r 5 at 2160r 6 at 1680r 7 at 1104r 8 at 816r
9 at 10224B-phi 10 at 10112r 11 at 768r 12 at 1056r 13 at 2112r 14 at 7280r weight:0.000000e+00
RegMasks: 8592r 10000r
********** MACHINEINSTRS **********
# Machine code for function __adddf3: NoPHIs, TracksLiveness
Frame Objects:
  fi#-2: size=8, align=8, fixed, at location [SP+12]
  fi#-1: size=8, align=16, fixed, at location [SP+4]
  fi#0: size=8, align=8, at location [SP+4]
  fi#1: size=8, align=8, at location [SP+4]
  fi#2: size=8, align=8, at location [SP+4]
Constant Pool:
  cp#0: 0x7FF8000000000000, align=8

0B      bb.0 (%ir-block.2):
          successors: %bb.2(0x20000000), %bb.1(0x60000000); %bb.2(25.00%),
%bb.1(75.00%)

16B       %243:gr32_nosp = MOVPC32r 0, implicit $esp, implicit $ssp
          DBG_VALUE %fixed-stack.1, 0, !"a", !DIExpression(), debug-location
!25; compiler-rt/lib/builtins/adddf3.c:0 line no:16
          DBG_VALUE %fixed-stack.0, 0, !"b", !DIExpression(), debug-location
!25; compiler-rt/lib/builtins/adddf3.c:0 line no:16
32B       %293:vr128 = MOVSDrm_alt %fixed-stack.0, 1, $noreg, 0, $noreg ::
(load 8 from %fixed-stack.0)
48B       %102:fr64 = MOVSDrm_alt %fixed-stack.1, 1, $noreg, 0, $noreg :: (load
8 from %fixed-stack.1, align 16)
          DBG_VALUE %102:fr64, $noreg, !"a", !DIExpression(), debug-location
!74; compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:17
          DBG_VALUE %102:fr64, $noreg, !"x", !DIExpression(), debug-location
!87; compiler-rt/lib/builtins/fp_lib.h:0 @[
compiler-rt/lib/builtins/fp_add_impl.inc:18:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ] line no:218
64B       %1:gr32 = MOV32ri 2147483647
80B       %0:gr32 = MOV32ri -1
96B       %3:gr32_nosp = MOV32ri 2146435072
          DBG_VALUE %293:vr128, $noreg, !"b", !DIExpression(), debug-location
!74; compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:17
112B      MOVSDmr %stack.0, 1, $noreg, 0, $noreg, %102:fr64, debug-location !89
:: (store 8 into %stack.0); compiler-rt/lib/builtins/fp_lib.h:222:11 @[
compiler-rt/lib/builtins/fp_add_impl.inc:18:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ]
128B      %48:gr32 = MOV32rm %stack.0, 1, $noreg, 0, $noreg, debug-location !89
:: (load 4 from %stack.0, align 8); compiler-rt/lib/builtins/fp_lib.h:222:11 @[
compiler-rt/lib/builtins/fp_add_impl.inc:18:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ]
          DBG_VALUE %48:gr32, $noreg, !"rep",
!DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !87;
compiler-rt/lib/builtins/fp_lib.h:0 @[
compiler-rt/lib/builtins/fp_add_impl.inc:18:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ] line no:222
          DBG_VALUE %48:gr32, $noreg, !"aRep",
!DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:18
          DBG_VALUE %48:gr32, $noreg, !"aAbs",
!DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:20
144B      %49:gr32 = MOV32rm %stack.0, 1, $noreg, 4, $noreg, debug-location !89
:: (load 4 from %stack.0 + 4); compiler-rt/lib/builtins/fp_lib.h:222:11 @[
compiler-rt/lib/builtins/fp_add_impl.inc:18:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ]
          DBG_VALUE %49:gr32, $noreg, !"rep",
!DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !87;
compiler-rt/lib/builtins/fp_lib.h:0 @[
compiler-rt/lib/builtins/fp_add_impl.inc:18:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ] line no:222
          DBG_VALUE %49:gr32, $noreg, !"aRep",
!DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:18
          DBG_VALUE %293:vr128, $noreg, !"x", !DIExpression(), debug-location
!90; compiler-rt/lib/builtins/fp_lib.h:0 @[
compiler-rt/lib/builtins/fp_add_impl.inc:19:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ] line no:218
160B      MOVSDmr %stack.1, 1, $noreg, 0, $noreg, %293:vr128, debug-location
!92 :: (store 8 into %stack.1); compiler-rt/lib/builtins/fp_lib.h:222:11 @[
compiler-rt/lib/builtins/fp_add_impl.inc:19:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ]
176B      %10:gr32 = MOV32rm %stack.1, 1, $noreg, 0, $noreg, debug-location !92
:: (load 4 from %stack.1, align 8); compiler-rt/lib/builtins/fp_lib.h:222:11 @[
compiler-rt/lib/builtins/fp_add_impl.inc:19:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ]
          DBG_VALUE %10:gr32, $noreg, !"rep",
!DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !90;
compiler-rt/lib/builtins/fp_lib.h:0 @[
compiler-rt/lib/builtins/fp_add_impl.inc:19:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ] line no:222
          DBG_VALUE %10:gr32, $noreg, !"bRep",
!DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:19
          DBG_VALUE %10:gr32, $noreg, !"bAbs",
!DIExpression(DW_OP_LLVM_fragment, 0, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:21
192B      %7:gr32 = MOV32rm %stack.1, 1, $noreg, 4, $noreg, debug-location !92
:: (load 4 from %stack.1 + 4); compiler-rt/lib/builtins/fp_lib.h:222:11 @[
compiler-rt/lib/builtins/fp_add_impl.inc:19:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ]
          DBG_VALUE %7:gr32, $noreg, !"rep", !DIExpression(DW_OP_LLVM_fragment,
32, 32), debug-location !90; compiler-rt/lib/builtins/fp_lib.h:0 @[
compiler-rt/lib/builtins/fp_add_impl.inc:19:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ] line no:222
          DBG_VALUE %7:gr32, $noreg, !"bRep",
!DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:19
208B      %9:gr32 = COPY %49:gr32, debug-location !93;
compiler-rt/lib/builtins/fp_add_impl.inc:20:27 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ]
224B      %9:gr32 = AND32ri %9:gr32(tied-def 0), 2147483647, implicit-def dead
$eflags, debug-location !93; compiler-rt/lib/builtins/fp_add_impl.inc:20:27 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ]
          DBG_VALUE %9:gr32, $noreg, !"aAbs",
!DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:20
240B      %11:gr32 = COPY %7:gr32, debug-location !94;
compiler-rt/lib/builtins/fp_add_impl.inc:21:27 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ]
256B      %11:gr32 = AND32ri %11:gr32(tied-def 0), 2147483647, implicit-def
dead $eflags, debug-location !94;
compiler-rt/lib/builtins/fp_add_impl.inc:21:27 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ]
          DBG_VALUE %11:gr32, $noreg, !"bAbs",
!DIExpression(DW_OP_LLVM_fragment, 32, 32), debug-location !74;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:21
272B      %108:gr32 = COPY %48:gr32, debug-location !95; 
# After Simple Register Coalescing
********** INTERVALS **********
%0
[64r,704B:0)[880B,992B:0)[1168B,1376r:0)[1376r,1472r:2)[1472r,1504r:3)[1504r,1504d:4)[1696B,1792B:0)[1840B,1920B:0)[2224B,4368r:0)[4368r,5744B:1)[5808B,7104r:1)
 0 at 64r 1 at 4368r 2 at 1376r 3 at 1472r 4 at 1504r weight:0.000000e+00
%1
[48r,704B:0)[880B,992B:0)[1168B,1408r:0)[1408r,1440r:2)[1440r,1504r:3)[1696B,1792B:0)[1840B,1920B:0)[2224B,4400r:0)[4400r,5744B:1)[5808B,7136r:1)
 0 at 48r 1 at 4400r 2 at 1408r 3 at 1440r weight:0.000000e+00
%3
[80r,704B:0)[880B,992B:0)[1168B,1280B:0)[1696B,1792B:0)[1840B,1920B:0)[2224B,5744B:0)[5808B,7232r:0)
 0 at 80r weight:0.000000e+00
%7
[176r,704B:0)[880B,1024r:0)[1024r,1056r:2)[1168B,1344r:0)[1344r,1440r:1)[1696B,1792B:0)[1840B,2048r:0)[2048r,2112r:3)[2224B,2496r:0)
 0 at 176r 1 at 1344r 2 at 1024r 3 at 2048r weight:0.000000e+00
%9
[192r,208r:0)[208r,704B:1)[880B,992B:1)[1168B,1280B:1)[1696B,1792B:1)[1840B,1920B:1)[2224B,2368r:1)[2368r,2368d:2)
 0 at 192r 1 at 208r 2 at 2368r weight:0.000000e+00
%10
[160r,704B:0)[880B,1040r:0)[1168B,1312r:0)[1312r,1472r:1)[1696B,1792B:0)[1840B,2080r:0)[2080r,2096r:2)[2224B,2464r:0)
 0 at 160r 1 at 1312r 2 at 2080r weight:0.000000e+00
%11
[224r,240r:0)[240r,704B:1)[880B,992B:1)[1168B,1280B:1)[1696B,1792B:1)[1840B,1952r:1)[1952r,1952d:2)[2224B,2368r:1)
 0 at 224r 1 at 240r 2 at 1952r weight:0.000000e+00
%16 [7408r,8352r:0)  0 at 7408r weight:0.000000e+00
%17 [7392r,8416r:0)  0 at 7392r weight:0.000000e+00
%36
[2512r,2528r:9)[2528r,2656r:3)[2656r,2768B:1)[3328r,3360r:11)[3360r,3424B:2)[3424B,5744B:0)[5808B,6528r:0)[6528r,6608B:5)[6608B,6960r:0)[6960r,7024B:4)[7024B,7200B:6)[7376B,7904r:6)[8192r,8208B:7)[8208B,8448r:8)[8448r,8544r:10)
 0 at 3424B-phi 1 at 2656r 2 at 3360r 3 at 2528r 4 at 6960r 5 at 6528r 6 at 7024B-phi 7 at 8192r
8 at 8208B-phi 9 at 2512r 10 at 8448r 11 at 3328r weight:0.000000e+00
%40 [4096r,4176r:0)  0 at 4096r weight:0.000000e+00
%47 [5824r,5840r:0)  0 at 5824r weight:0.000000e+00
%48
[112r,752r:2)[880B,992B:2)[1168B,1312r:2)[1696B,1792B:2)[1840B,2080r:2)[2224B,2464r:2)[2464r,5744B:0)[5808B,7104r:0)[7104r,7264r:1)[7376B,8736B:1)[9264B,9296r:1)[9296r,9296d:3)[9520B,9552r:1)[9552r,9552d:4)
 0 at 2464r 1 at 7104r 2 at 112r 3 at 9296r 4 at 9552r weight:0.000000e+00
%49
[128r,736r:2)[736r,768r:3)[880B,992B:2)[1168B,1344r:2)[1696B,1792B:2)[1840B,2048r:2)[2224B,2496r:2)[2496r,5744B:0)[5808B,7136r:0)[7136r,7232r:1)[7232r,7248r:4)[7376B,8736B:1)[9264B,9296r:1)[9520B,9552r:1)
 0 at 2496r 1 at 7136r 2 at 128r 3 at 736r 4 at 7232r weight:0.000000e+00
%51 [2416r,2432r:2)[2432r,4432r:0)[4432r,5568r:1)  0 at 2432r 1 at 4432r 2 at 2416r
weight:0.000000e+00
%52
[2704r,2768B:2)[3232r,3312r:5)[3312r,3424B:3)[3424B,5520r:0)[5520r,5648r:1)[5648r,5744B:4)[5808B,5888r:4)[5952B,6400r:4)[6400r,6496r:6)[6608B,6640r:1)
 0 at 3424B-phi 1 at 5520r 2 at 2704r 3 at 3312r 4 at 5648r 5 at 3232r 6 at 6400r
weight:0.000000e+00
%53
[2608r,2624r:6)[2624r,3168r:3)[3168r,3280r:7)[3280r,3424B:4)[3424B,4464r:2)[4464r,5552r:0)[5552r,5680r:1)[5680r,5744B:5)[5808B,5904r:5)[5952B,6352r:5)[6352r,6464r:8)[6464r,6560r:9)[6608B,6672r:1)
 0 at 4464r 1 at 5552r 2 at 3424B-phi 3 at 2624r 4 at 3280r 5 at 5680r 6 at 2608r 7 at 3168r 8 at 6352r
9 at 6464r weight:0.000000e+00
%56 [4576r,4592r:0)[4592r,4624B:1)[4688B,4736B:1)[4832B,5280r:1)  0 at 4576r
1 at 4592r weight:0.000000e+00
%57 [5120r,5168r:0)[5168r,5408r:1)  0 at 5120r 1 at 5168r weight:0.000000e+00
%78 [7808r,7856r:0)[7856r,8144r:1)  0 at 7808r 1 at 7856r weight:0.000000e+00
%84
[8272r,8288r:10)[8288r,8352r:9)[8352r,8480r:0)[8480r,8960r:1)[8960r,9168r:2)[9168r,9264B:6)[9264B,9424r:1)[9424r,9520B:4)[9520B,9680r:1)[9680r,9760B:3)[9760B,9920B:5)[9920B,10048B:7)[10048B,10096r:8)
 0 at 8352r 1 at 8480r 2 at 8960r 3 at 9680r 4 at 9424r 5 at 9760B-phi 6 at 9168r 7 at 9920B-phi
8 at 10048B-phi 9 at 8288r 10 at 8272r weight:0.000000e+00
%88 [9120r,9136r:2)[9136r,9168r:0)  0 at 9136r 1 at x 2 at 9120r weight:0.000000e+00
%102
[32r,704B:0)[880B,992B:0)[1168B,1536B:0)[1552r,1600B:1)[1600B,1632B:0)[1632B,1664r:2)[1696B,1792B:0)[1840B,1920B:0)[2224B,2272r:0)
 0 at 32r 1 at 1552r 2 at 1632B-phi weight:0.000000e+00
%104 [336r,352r:0)[352r,512r:1)  0 at 336r 1 at 352r weight:0.000000e+00
%105 [368r,384r:0)[384r,544r:1)  0 at 368r 1 at 384r weight:0.000000e+00
%106 [400r,512r:0)  0 at 400r weight:0.000000e+00
%108 [256r,272r:0)[272r,416r:1)  0 at 256r 1 at 272r weight:0.000000e+00
%109 [288r,304r:0)[304r,448r:1)  0 at 288r 1 at 304r weight:0.000000e+00
%111 [432r,448r:0)[448r,448d:1)  0 at 432r 1 at 448r weight:0.000000e+00
%113 [320r,544r:0)[544r,544d:1)  0 at 320r 1 at 544r weight:0.000000e+00
%114 [608r,624r:0)[624r,624d:1)  0 at 608r 1 at 624r weight:0.000000e+00
%115 [640r,656r:0)[656r,656d:1)  0 at 640r 1 at 656r weight:0.000000e+00
%116 [896r,912r:0)[912r,912d:1)  0 at 896r 1 at 912r weight:0.000000e+00
%117 [928r,944r:0)[944r,944d:1)  0 at 928r 1 at 944r weight:0.000000e+00
%119 [1184r,1200r:2)[1200r,1232r:0)[1232r,1232d:1)  0 at 1200r 1 at 1232r 2 at 1184r
weight:0.000000e+00
%121 [1712r,1728r:2)[1728r,1760r:0)[1760r,1760d:1)  0 at 1728r 1 at 1760r 2 at 1712r
weight:0.000000e+00
%122 [1856r,1872r:0)[1872r,1872d:1)  0 at 1856r 1 at 1872r weight:0.000000e+00
%123 [2240r,2256r:0)[2256r,2256d:1)  0 at 2240r 1 at 2256r weight:0.000000e+00
%133 [3104r,3120r:0)[3120r,3248r:1)  0 at 3104r 1 at 3120r weight:0.000000e+00
%135 [3200r,3216r:0)[3216r,3312r:1)  0 at 3200r 1 at 3216r weight:0.000000e+00
%143 [3968r,3984r:0)[3984r,4112r:1)  0 at 3968r 1 at 3984r weight:0.000000e+00
%158 [4880r,4912r:0)[4912r,5040r:1)  0 at 4880r 1 at 4912r weight:0.000000e+00
%161 [5024r,5344r:0)  0 at 5024r weight:0.000000e+00
%162 [4944r,4960r:2)[4960r,5072r:0)[5072r,5152r:1)  0 at 4960r 1 at 5072r 2 at 4944r
weight:0.000000e+00
%163 [4992r,5008r:2)[5008r,5104r:0)[5104r,5152r:1)[5152r,5152d:3)  0 at 5008r
1 at 5104r 2 at 4992r 3 at 5152r weight:0.000000e+00
%171 [6816r,6832r:0)[6832r,6896r:1)  0 at 6816r 1 at 6832r weight:0.000000e+00
%173 [5696r,5712r:0)[5712r,5712d:1)  0 at 5696r 1 at 5712r weight:0.000000e+00
%185 [7712r,8080r:0)  0 at 7712r weight:0.000000e+00
%188 [7584r,7600r:0)[7600r,7728r:1)  0 at 7584r 1 at 7600r weight:0.000000e+00
%191 [7632r,7648r:2)[7648r,7760r:0)[7760r,7840r:1)  0 at 7648r 1 at 7760r 2 at 7632r
weight:0.000000e+00
%192 [7680r,7696r:2)[7696r,7792r:0)[7792r,7840r:1)[7840r,7840d:3)  0 at 7696r
1 at 7792r 2 at 7680r 3 at 7840r weight:0.000000e+00
%196 [7872r,7904r:0)[7904r,8016r:1)  0 at 7872r 1 at 7904r weight:0.000000e+00
%208 [8608r,8752r:0)  0 at 8608r weight:0.000000e+00
%212 [9568r,9632r:0)  0 at 9568r weight:0.000000e+00
%214 [9600r,9632r:0)[9632r,9648r:1)  0 at 9600r 1 at 9632r weight:0.000000e+00
%215 [9648r,9680r:0)  0 at 9648r weight:0.000000e+00
%217 [9312r,9376r:0)  0 at 9312r weight:0.000000e+00
%219 [9344r,9376r:0)[9376r,9392r:1)  0 at 9344r 1 at 9376r weight:0.000000e+00
%220 [9392r,9424r:0)  0 at 9392r weight:0.000000e+00
%228 [10112r,10144r:0)  0 at 10112r weight:0.000000e+00
%232 [7248r,7296r:0)  0 at 7248r weight:0.000000e+00
%240 [2112r,2144r:0)  0 at 2112r weight:0.000000e+00
%253 [1056r,1088r:0)  0 at 1056r weight:0.000000e+00
%258 [768r,800r:0)  0 at 768r weight:0.000000e+00
%261 [10256r,10272r:0)  0 at 10256r weight:0.000000e+00
%267 [8864r,8896r:0)[8896r,8960r:1)  0 at 8864r 1 at 8896r weight:0.000000e+00
%269
[2848r,2880r:3)[2880r,2928B:1)[2944r,2976r:5)[2976r,3008r:4)[3008r,3040B:0)[3040B,3360r:2)
 0 at 3008r 1 at 2880r 2 at 3040B-phi 3 at 2848r 4 at 2976r 5 at 2944r weight:0.000000e+00
%273
[3712r,3744r:3)[3744r,3792B:1)[3808r,3840r:5)[3840r,3872r:4)[3872r,3904B:0)[3904B,4224r:2)
 0 at 3872r 1 at 3744r 2 at 3904B-phi 3 at 3712r 4 at 3840r 5 at 3808r weight:0.000000e+00
%276
[2544r,2560r:4)[2560r,2592r:3)[2592r,3632B:0)[4192r,4224r:5)[4224r,4288B:1)[4288B,4592r:2)
 0 at 2592r 1 at 4224r 2 at 4288B-phi 3 at 2560r 4 at 2544r 5 at 4192r weight:0.000000e+00
%277
[2384r,2400r:14)[2400r,4080r:12)[4080r,4176r:16)[4176r,4288B:13)[4288B,4528r:5)[4528r,4736B:0)[4768r,4832B:1)[4832B,5216r:0)[5216r,5312r:18)[5312r,5408r:19)[5408r,5456B:2)[5456B,5648r:3)[5888r,5952B:7)[6416r,6496r:17)[6496r,6608B:8)[6608B,6640r:3)[6640r,6864r:4)[6864r,6896r:20)[6896r,7024B:6)[7024B,7200B:9)[7376B,7952r:9)[7952r,8048r:21)[8048r,8144r:22)[8144r,8208B:10)[8208B,8320r:11)[8320r,9104B:15)[9264B,9808r:15)
 0 at 4528r 1 at 4768r 2 at 5408r 3 at 5456B-phi 4 at 6640r 5 at 4288B-phi 6 at 6896r 7 at 5888r
8 at 6496r 9 at 7024B-phi 10 at 8144r 11 at 8208B-phi 12 at 2400r 13 at 4176r 14 at 2384r 15 at 8320r
16 at 4080r 17 at 6416r 18 at 5216r 19 at 5312r 20 at 6864r 21 at 7952r 22 at 8048r
weight:0.000000e+00
%278
[3488r,3504r:15)[3504r,4032r:12)[4032r,4144r:27)[4144r,4288B:13)[4288B,4496r:14)[4496r,4560r:5)[4560r,4736B:0)[4752r,4832B:1)[4832B,5264r:0)[5264r,5344r:28)[5344r,5456B:2)[5456B,5680r:3)[5904r,5952B:7)[6560r,6608B:8)[6608B,6672r:3)[6672r,6928r:4)[6928r,7024B:6)[7024B,7200B:9)[7376B,8000r:9)[8000r,8080r:29)[8080r,8208B:10)[8208B,8384r:11)[8384r,8416r:16)[8416r,8512r:17)[8512r,8544r:18)[8544r,8992r:19)[8992r,9200r:20)[9200r,9264B:24)[9264B,9456r:19)[9456r,9520B:22)[9520B,9712r:19)[9712r,9760B:21)[9760B,9920B:23)[9920B,10048B:25)[10048B,10112r:26)
 0 at 4560r 1 at 4752r 2 at 5344r 3 at 5456B-phi 4 at 6672r 5 at 4496r 6 at 6928r 7 at 5904r 8 at 6560r
9 at 7024B-phi 10 at 8080r 11 at 8208B-phi 12 at 3504r 13 at 4144r 14 at 4288B-phi 15 at 3488r
16 at 8384r 17 at 8416r 18 at 8512r 19 at 8544r 20 at 8992r 21 at 9712r 22 at 9456r 23 at 9760B-phi
24 at 9200r 25 at 9920B-phi 26 at 10048B-phi 27 at 4032r 28 at 5264r 29 at 8000r
weight:0.000000e+00
%279
[6032r,6064r:4)[6064r,6112B:1)[6128r,6160r:6)[6160r,6192r:5)[6192r,6224B:0)[6224B,6272r:2)[6272r,6528r:3)
 0 at 6192r 1 at 6064r 2 at 6224B-phi 3 at 6272r 4 at 6032r 5 at 6160r 6 at 6128r
weight:0.000000e+00
%292
[16r,704B:0)[752r,800r:11)[800r,880B:8)[880B,992B:0)[1040r,1088r:12)[1088r,1168B:7)[1168B,1280B:0)[1664r,1696B:6)[1696B,2016B:0)[2096r,2144r:13)[2144r,2224B:5)[2272r,2320B:1)[5760r,5808B:2)[7264r,7296r:14)[7296r,7376B:4)[10096r,10144r:10)[10144r,10208B:3)[10208B,10240r:9)
 0 at 16r 1 at 2272r 2 at 5760r 3 at 10144r 4 at 7296r 5 at 2144r 6 at 1664r 7 at 1088r 8 at 800r
9 at 10208B-phi 10 at 10096r 11 at 752r 12 at 1040r 13 at 2096r 14 at 7264r weight:0.000000e+00
RegMasks: 8576r 9984r
********** MACHINEINSTRS **********
# Machine code for function __adddf3: NoPHIs, TracksLiveness
Frame Objects:
  fi#-2: size=8, align=8, fixed, at location [SP+12]
  fi#-1: size=8, align=16, fixed, at location [SP+4]
  fi#0: size=8, align=8, at location [SP+4]
  fi#1: size=8, align=8, at location [SP+4]
  fi#2: size=8, align=8, at location [SP+4]
Constant Pool:
  cp#0: 0x7FF8000000000000, align=8

0B      bb.0 (%ir-block.2):
          successors: %bb.2(0x20000000), %bb.1(0x60000000); %bb.2(25.00%),
%bb.1(75.00%)

          DBG_VALUE %fixed-stack.1, 0, !"a", !DIExpression(), debug-location
!24; compiler-rt/lib/builtins/adddf3.c:0 line no:16
          DBG_VALUE %fixed-stack.0, 0, !"b", !DIExpression(), debug-location
!24; compiler-rt/lib/builtins/adddf3.c:0 line no:16
16B       %292:vr128 = MOVSDrm_alt %fixed-stack.0, 1, $noreg, 0, $noreg ::
(load 8 from %fixed-stack.0)
32B       %102:fr64 = MOVSDrm_alt %fixed-stack.1, 1, $noreg, 0, $noreg :: (load
8 from %fixed-stack.1, align 16)
          DBG_VALUE %102:fr64, $noreg, !"a", !DIExpression(), debug-location
!73; compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:17
          DBG_VALUE %102:fr64, $noreg, !"x", !DIExpression(), debug-location
!86; compiler-rt/lib/builtins/fp_lib.h:0 @[
compiler-rt/lib/builtins/fp_add_impl.inc:18:16 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] ] line no:218
48B       %1:gr32 = MOV32ri 2147483647
64B       %0:gr32 = MOV32ri -1
80B       %3:gr32_nosp = MOV32ri 2146435072

...... ***** Comments < 65535 *****

# End machine code for function __adddf3.

*** Bad machine code: Invalid register class for subregister index ***
- function:    __adddf3
- basic block: %bb.29  (0x7f8177083600) [4832B;5456B)
- instruction: DBG_VALUE %277.sub_8bit:gr32, $noreg, !"sticky",
!DIExpression(), debug-location !248;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:97
- operand 0:   %277.sub_8bit:gr32
Register class GR32 does not fully support subreg index 1

*** Bad machine code: Invalid register class for subregister index ***
- function:    __adddf3
- basic block: %bb.43  (0x7f81770866e0) [7536B;8208B)
- instruction: DBG_VALUE %277.sub_8bit:gr32, $noreg, !"sticky",
!DIExpression(), debug-location !302;
compiler-rt/lib/builtins/fp_add_impl.inc:0 @[
compiler-rt/lib/builtins/adddf3.c:16:62 ] line no:136
- operand 0:   %277.sub_8bit:gr32
Register class GR32 does not fully support subreg index 1
fatal error: error in backend: Found 2 machine code errors.
Stack dump:
0.      Program arguments:
/Users/abaelhe/workspace/APPLE/swift-master/llvm/build/./bin/clang -DKERNEL_USE
-I/Users/abaelhe/workspace/APPLE/swift-master/llvm/compiler-rt/lib/builtins/../../include
-O2 -g -DNDEBUG -arch i386 -isysroot
/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.15.sdk
-isysroot
/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.15.sdk
-mmacosx-version-min=10.5 -fPIC -O3 -fvisibility=hidden -DVISIBILITY_HIDDEN
-Wall -fomit-frame-pointer -arch i386 -mkernel -o
CMakeFiles/clang_rt.cc_kext_i386_osx.dir/adddf3.c.o -c
/Users/abaelhe/workspace/APPLE/swift-master/llvm/compiler-rt/lib/builtins/adddf3.c 
1.      <eof> parser at end of file
2.      Code generation
3.      Running pass 'Function Pass Manager' on module
'/Users/abaelhe/workspace/APPLE/swift-master/llvm/compiler-rt/lib/builtins/adddf3.c'.
4.      Running pass 'Verify generated machine code' on function '@__adddf3'
0  libLLVMSupport.dylib       0x000000010cd19148
llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 40
1  libLLVMSupport.dylib       0x000000010cd18095 llvm::sys::RunSignalHandlers()
+ 85
2  libLLVMSupport.dylib       0x000000010cd188a2
llvm::sys::CleanupOnSignal(unsigned long) + 210
3  libLLVMSupport.dylib       0x000000010cc4d311
llvm::CrashRecoveryContext::HandleExit(int) + 113
4  libLLVMSupport.dylib       0x000000010cc4d2ae
llvm::CrashRecoveryContext::HandleExit(int) + 14
5  libLLVMSupport.dylib       0x000000010cd14fd3 llvm::sys::Process::Exit(int)
+ 35
6  clang                      0x0000000107dd9ff2 cc1_main(llvm::ArrayRef<char
const*>, char const*, void*) + 4242
7  libLLVMSupport.dylib       0x000000010cc5907b
llvm::report_fatal_error(llvm::Twine const&, bool) + 251
8  libLLVMCodeGen.dylib       0x000000010b28b334
llvm::MachineFunction::verify(llvm::Pass*, char const*, bool) const + 29092
9  libLLVMCodeGen.dylib       0x000000010b1f13e4
llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 292
10 libLLVMCore.dylib          0x000000010c9c1e6b
llvm::FPPassManager::runOnFunction(llvm::Function&) + 1099
11 libLLVMCore.dylib          0x000000010c9c2203
llvm::FPPassManager::runOnModule(llvm::Module&) + 67
12 libLLVMCore.dylib          0x000000010c9c2679
llvm::legacy::PassManagerImpl::run(llvm::Module&) + 921
13 libclangCodeGen.dylib      0x000000010abf77fb
clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::HeaderSearchOptions
const&, clang::CodeGenOptions const&, clang::TargetOptions const&,
clang::LangOptions const&, llvm::DataLayout const&, llvm::Module*,
clang::BackendAction, std::__1::unique_ptr<llvm::raw_pwrite_stream,
std::__1::default_delete<llvm::raw_pwrite_stream> >) + 12715
14 libclangCodeGen.dylib      0x000000010aebb74a
clang::EmitObjAction::EmitObjAction(llvm::LLVMContext*) + 2138
15 libclangParse.dylib        0x000000010fcaae28 clang::ParseAST(clang::Sema&,
bool, bool) + 680
16 libclangFrontend.dylib     0x000000010bc7b92b
clang::FrontendAction::Execute() + 75
17 libclangFrontend.dylib     0x000000010bc24711
clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) + 1297
18 libclangFrontendTool.dylib 0x0000000109c8e74a
clang::ExecuteCompilerInvocation(clang::CompilerInstance*) + 1706
19 clang                      0x0000000107dd98be cc1_main(llvm::ArrayRef<char
const*>, char const*, void*) + 2398
20 clang                      0x0000000107dd75bc main + 13324
21 libclangDriver.dylib       0x000000010bd78fb7
clang::driver::JobList::clear() + 2103
22 libLLVMSupport.dylib       0x000000010cc4d28a
llvm::CrashRecoveryContext::RunSafely(llvm::function_ref<void ()>) + 218
23 libclangDriver.dylib       0x000000010bd78267
clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef>
>, std::__1::basic_string<char, std::__1::char_traits<char>,
std::__1::allocator<char> >*, bool*) const + 343
24 libclangDriver.dylib       0x000000010bd4a48c
clang::driver::Compilation::ExecuteCommand(clang::driver::Command const&,
clang::driver::Command const*&) const + 220
25 libclangDriver.dylib       0x000000010bd4a97c
clang::driver::Compilation::ExecuteJobs(clang::driver::JobList const&,
llvm::SmallVectorImpl<std::__1::pair<int, clang::driver::Command const*> >&)
const + 124
26 libclangDriver.dylib       0x000000010bd5febc
clang::driver::Driver::ExecuteCompilation(clang::driver::Compilation&,
llvm::SmallVectorImpl<std::__1::pair<int, clang::driver::Command const*> >&) +
204
27 clang                      0x0000000107dd679d main + 9709
28 libdyld.dylib              0x00007fff6d167cc9 start + 1
clang-10: error: clang frontend command failed with exit code 70 (use -v to see
invocation)
Abael.com clang version 10.0.1 
Target: i386-apple-darwin19.6.0
Thread model: posix
InstalledDir: /Users/abaelhe/workspace/APPLE/swift-master/llvm/build/./bin
clang-10: note: diagnostic msg: PLEASE submit a bug report to
https://bugs.llvm.org/ and include the crash backtrace, preprocessed source,
and associated run script.
fatal error: error in backend: Found 2 machine code errors.
Stack dump:
0.      Program arguments:
/Users/abaelhe/workspace/APPLE/swift-master/llvm/build/./bin/clang -O2 -g
-DNDEBUG -arch i386 -isysroot
/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.15.sdk
-isysroot
/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX10.15.sdk
-mmacosx-version-min=10.5 -fPIC -O3 -fvisibility=hidden -DVISIBILITY_HIDDEN
-Wall -fomit-frame-pointer -arch i386 -o
CMakeFiles/clang_rt.builtins_i386_osx.dir/adddf3.c.o -c
/Users/abaelhe/workspace/APPLE/swift-master/llvm/compiler-rt/lib/builtins/adddf3.c 
1.      <eof> parser at end of file
2.      Code generation
3.      Running pass 'Function Pass Manager' on module
'/Users/abaelhe/workspace/APPLE/swift-master/llvm/compiler-rt/lib/builtins/adddf3.c'.
4.      Running pass 'Verify generated machine code' on function '@__adddf3'
0  libLLVMSupport.dylib       0x000000010f1ea148 llvm::sys::PrintStackTrace(l[
72%] Building CXX object
lib/xray/CMakeFiles/RTXrayBASIC.osx.dir/xray_basic_flags.cpp.o
[ 72%] Building CXX object
lib/xray/CMakeFiles/RTXrayFDR.osx.dir/xray_fdr_logging.cpp.o
[ 72%] Building C object
lib/builtins/CMakeFiles/clang_rt.builtins_i386_osx.dir/divdc3.c.o
lvm::raw_ostream&) + 40
1  libLLVMSupport.dylib       0x000000010f1e9095 llvm::sys::RunSignalHandlers()
+ 85
2  libLLVMSupport.dylib       0x000000010f1e98a2
llvm::sys::CleanupOnSignal(unsigned long) + 210
3  libLLVMSupport.dylib       0x000000010f11e311
llvm::CrashRecoveryContext::HandleExit(int) + 113
4  libLLVMSupport.dylib       0x000000010f11e2ae
llvm::CrashRecoveryContext::HandleExit(int) + 14
5  libLLVMSupport.dylib       0x000000010f1e5fd3 llvm::sys::Process::Exit(int)
+ 35
6  clang                      0x000000010a2a6ff2 cc1_main(llvm::ArrayRef<char
const*>, char const*, void*) + 4242
7  libLLVMSupport.dylib       0x000000010f12a07b
llvm::report_fatal_error(llvm::Twine const&, bool) + 251
8  libLLVMCodeGen.dylib       0x000000010d71e334
llvm::MachineFunction::verify(llvm::Pass*, char const*, bool) const + 29092
9  libLLVMCodeGen.dylib       0x000000010d6843e4
llvm::MachineFunctionPass::runOnFunction(llvm::Function&) + 292
10 libLLVMCore.dylib          0x000000010ee8be6b
llvm::FPPassManager::runOnFunction(llvm::Function&) + 1099
11 libLLVMCore.dylib          0x000000010ee8c203
llvm::FPPassManager::runOnModule(llvm::Module&) + 67
12 libLLVMCore.dylib          0x000000010ee8c679
llvm::legacy::PassManagerImpl::run(llvm::Module&) + 921
13 libclangCodeGen.dylib      0x000000010d0837fb
clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::HeaderSearchOptions
const&, clang::CodeGenOptions const&, clang::TargetOptions const&,
clang::LangOptions const&, llvm::DataLayout const&, llvm::Module*,
clang::BackendAction, std::__1::unique_ptr<llvm::raw_pwrite_stream,
std::__1::default_delete<llvm::raw_pwrite_stream> >) + 12715
14 libclangCodeGen.dylib      0x000000010d34774a
clang::EmitObjAction::EmitObjAction(llvm::LLVMContext*) + 2138
15 libclangParse.dylib        0x0000000112200e28 clang::ParseAST(clang::Sema&,
bool, bool) + 680
16 libclangFrontend.dylib     0x000000010e12692b
clang::FrontendAction::Execute() + 75
17 libclangFrontend.dylib     0x000000010e0cf711
clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) + 1297
18 libclangFrontendTool.dylib 0x000000010c91674a
clang::ExecuteCompilerInvocation(clang::CompilerInstance*) + 1706
19 clang                      0x000000010a2a68be cc1_main(llvm::ArrayRef<char
const*>, char const*, void*) + 2398
20 clang                      0x000000010a2a45bc main + 13324
21 libclangDriver.dylib       0x000000010e22afb7
clang::driver::JobList::clear() + 2103
22 libLLVMSupport.dylib       0x000000010f11e28a
llvm::CrashRecoveryContext::RunSafely(llvm::function_ref<void ()>) + 218
23 libclangDriver.dylib       0x000000010e22a267
clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef>
>, std::__1::basic_string<char, std::__1::char_traits<char>,
std::__1::allocator<char> >*, bool*) const + 343
24 libclangDriver.dylib       0x000000010e1fc48c
clang::driver::Compilation::ExecuteCommand(clang::driver::Command const&,
clang::driver::Command const*&) const + 220
25 libclangDriver.dylib       0x000000010e1fc97c
clang::driver::Compilation::ExecuteJobs(clang::driver::JobList const&,
llvm::SmallVectorImpl<std::__1::pair<int, clang::driver::Command const*> >&)
const + 124
26 libclangDriver.dylib       0x000000010e211ebc
clang::driver::Driver::ExecuteCompilation(clang::driver::Compilation&,
llvm::SmallVectorImpl<std::__1::pair<int, clang::driver::Command const*> >&) +
204
27 clang                      0x000000010a2a379d main + 9709
28 libdyld.dylib              0x00007fff6d167cc9 start + 1
29 libdyld.dylib              0x0000000000000017 start + 18446603338685973327
clang-10: error: clang frontend command failed with exit code 70 (use -v to see
invocation)
Abael.com clang version 10.0.1 
Target: i386-apple-darwin19.6.0
Thread model: posix
InstalledDir: /Users/abaelhe/workspace/APPLE/swift-master/llvm/build/./bin
clang-10: note: diagnostic msg: PLEASE submit a bug report to
https://bugs.llvm.org/ and include the crash backtrace, preprocessed source,
and associated run script.

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