[llvm-bugs] [Bug 41249] New: new hang in x86 DagCombiner

via llvm-bugs llvm-bugs at lists.llvm.org
Tue Mar 26 14:35:13 PDT 2019


https://bugs.llvm.org/show_bug.cgi?id=41249

            Bug ID: 41249
           Summary: new hang in x86 DagCombiner
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: greg.bedwell at sony.com
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org,
                    llvm-dev at redking.me.uk, spatel+llvm at rotateright.com

The following reproducer hangs llc since r356864.

~~~~
greg at greg-win10:/mnt/g/llvm-project/linux-build$ cat 1.ll
; ModuleID = 'bugpoint-reduced-simplified.bc'
source_filename = "1.ll"
target triple = "x86_64-unknown-linux-gnu"

%struct.a = type {}
%struct.b = type {}

@c = external global %struct.a
@d = external global <4 x float>

declare void @e(%struct.b*, <4 x float>)

define void @g() #0 {
  %1 = load <2 x float>, <2 x float>* bitcast (%struct.a* @c to <2 x float>*)
  %2 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> <i32 undef,
i32 undef, i32 0, i32 1>
  %3 = shufflevector <4 x float> %2, <4 x float> <float undef, float undef,
float 0.000000e+00, float 0.000000e+00>, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
  store <4 x float> %3, <4 x float>* @d
  %4 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32>
zeroinitializer
  call void @e(%struct.b* undef, <4 x float> %4)
  ret void
}

attributes #0 = { "target-features"="+sse4.2" }


greg at greg-win10:/mnt/g/llvm-project/linux-build$ ./bin/llc 1.ll
^C
~~~~

It appears to never break out of the loop in DAGCombiner::Run :

~~~~
  // While the worklist isn't empty, find a node and try to combine it.
  while (!WorklistMap.empty()) {
    SDNode *N;
~~~~

I bisected to:

~~~~
commit 87d4ab8b92e17db517499403eaa2e0b19992fae2 (refs/bisect/bad)
Author:     Simon Pilgrim <llvm-dev at redking.me.uk>
AuthorDate: Sun Mar 24 19:06:35 2019 +0000
Commit:     Simon Pilgrim <llvm-dev at redking.me.uk>
CommitDate: Sun Mar 24 19:06:35 2019 +0000

    [X86][SSE41] Start shuffle combining from ZERO_EXTEND_VECTOR_INREG
(PR40685)

    Enable SSE41 ZERO_EXTEND_VECTOR_INREG shuffle combines - for the
PMOVZX(PSHUFD(V)) -> UNPCKH(V,0) pattern we reduce the shuffles
(port5-bottleneck on Intel) at the expense of creating a zero (pxor v,v) and an
extra register move - which is a good trade off as these are pretty cheap and
in most cases it doesn't increase register pressure.

    This also exposed a missed opportunity to use combine to
ZERO_EXTEND_VECTOR_INREG with folded loads - even if we're in the float domain.

    llvm-svn: 356864
~~~~

This is from the following source level reproducer:

~~~~
greg at greg-win10:/mnt/g/llvm-project/linux-build$ cat 1.cpp
using a = float __attribute__((ext_vector_type(4)));
struct b {
  b(a);
};
b c(a d) { return __builtin_ia32_shufps(d, d, 0); }
struct e {
  float aa, bb;
} f;
a g, h;
void i() {
  a j, k{f.aa, f.aa, f.aa, f.aa};
  h = {};
  j = {f.bb, f.bb, f.bb, f.bb};
  a l = __builtin_shufflevector(k, j, 2, 6, 3, 7);
  g = __builtin_shufflevector(l, h, 2, 6, 3, 7);
  c(g);
}
greg at greg-win10:/mnt/g/llvm-project/linux-build$ ./bin/clang 1.cpp -c -O3
greg at greg-win10:/mnt/g/llvm-project/linux-build$ ./bin/clang 1.cpp -c -O3
-march=btver2
^C
~~~~

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