[llvm-bugs] [Bug 42424] New: shufflevector of load does not reduce load size

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=42424

            Bug ID: 42424
           Summary: shufflevector of load does not reduce load size
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: Matthew.Arsenault at amd.com
                CC: llvm-bugs at lists.llvm.org

define <4 x half> @shuffle_v4f16_0101(<4 x half> addrspace(1)* nocapture
readonly %arg0, <4 x half> addrspace(1)* nocapture readnone %arg1) {
  %val0 = load <4 x half>, <4 x half> addrspace(1)* %arg0, align 8
  %shuffle = shufflevector <4 x half> %val0, <4 x half> undef, <4 x i32> <i32
0, i32 1, i32 0, i32 1>
  ret <4 x half> %shuffle
}

I would expect instcombine to recognize that only the low half of the load is
used, and reduce this to a load <2 x half>

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