[llvm-bugs] [Bug 42770] New: [SCEV][LSR] Assertion `!BaseReg->isZero() && "Zero allocated in a base register!"' failed

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=42770

            Bug ID: 42770
           Summary: [SCEV][LSR] Assertion `!BaseReg->isZero() && "Zero
                    allocated in a base register!"' failed
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: suc-daniil at yandex.ru
                CC: llvm-bugs at lists.llvm.org

Reproducer:
===========================================
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1"

define void @foo() {
bb:
  br label %bb4

bb1:                                              ; preds = %bb13
  %tmp = shl i64 %tmp14, 32
  %tmp2 = add i64 %tmp, 1
  %tmp3 = ashr i64 %tmp2, 32
  ret void

bb4:                                              ; preds = %bb13, %bb
  %tmp5 = phi i64 [ 2, %bb ], [ %tmp14, %bb13 ]
  %tmp6 = add i64 %tmp5, 4
  %tmp7 = trunc i64 %tmp6 to i16
  %tmp8 = urem i16 %tmp7, 3
  %tmp9 = mul i16 %tmp8, 2
  %tmp10 = icmp eq i16 %tmp9, 1
  br i1 %tmp10, label %bb11, label %bb13

bb11:                                             ; preds = %bb4
  %tmp12 = udiv i16 1, %tmp7
  unreachable

bb13:                                             ; preds = %bb4
  %tmp14 = add nuw nsw i64 %tmp5, 6
  br i1 undef, label %bb1, label %bb4
}
===========================================
$ opt -loop-reduce repro.ll -S
opt: llvm-project/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:1550: bool
{anonymous}::LSRUse::InsertFormula(const {anonymous}::Formula&, const
llvm::Loop&): Assertion `!BaseReg->isZero() && "Zero allocated in a base
register!"' failed.
===========================================

git-bisect pointed at the following commit:
commit 405728fd47a555e51196a6883d33318f22fab9a4
Author: Alexandre Isoard <alexandre.isoard at gmail.com>
Date:   Fri Sep 1 14:59:59 2017 +0000

    [SCEV] Add URem support to SCEV

    In LLVM IR the following code:

        %r = urem <ty> %t, %b

    is equivalent to

        %q = udiv <ty> %t, %b
        %s = mul <ty> nuw %q, %b
        %r = sub <ty> nuw %t, %q ; (t / b) * b + (t % b) = t

    As UDiv, Mul and Sub are already supported by SCEV, URem can be implemented
    with minimal effort using that relation:

        %r --> (-%b * (%t /u %b)) + %t

    We implement two special cases:

      - if %b is 1, the result is always 0
      - if %b is a power-of-two, we produce a zext/trunc based expression
instead

    That is, the following code:

        %r = urem i32 %t, 65536

    Produces:

        %r --> (zext i16 (trunc i32 %a to i16) to i32)

    Note that while this helps get a tighter bound on the range analysis and
the
    known-bits analysis, this exposes some normalization shortcoming of SCEVs:

        %div = udim i32 %a, 65536
        %mul = mul i32 %div, 65536
        %rem = urem i32 %a, 65536
        %add = add i32 %mul, %rem

    Will usually not be reduced.

    llvm-svn: 312329

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