[llvm-bugs] [Bug 39449] New: [AMDGPU][MC] Fixed order of optional operands

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=39449

            Bug ID: 39449
           Summary: [AMDGPU][MC] Fixed order of optional operands
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: unassignedbugs at nondot.org
          Reporter: dpreobrazhensky at luxoft.com
                CC: llvm-bugs at lists.llvm.org

Current implementation of assembler expects all optional operands in a fixed
order. It would be convenient to specify operands in an arbitrary order like
sp3 does.

This possibility should be investigated. By design, llvm does not support this
feature.

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