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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [AMDGPU][MC] Fixed order of optional operands"
href="https://bugs.llvm.org/show_bug.cgi?id=39449">39449</a>
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<th>Summary</th>
<td>[AMDGPU][MC] Fixed order of optional operands
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: AMDGPU
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpreobrazhensky@luxoft.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<p>
<div>
<pre>Current implementation of assembler expects all optional operands in a fixed
order. It would be convenient to specify operands in an arbitrary order like
sp3 does.
This possibility should be investigated. By design, llvm does not support this
feature.</pre>
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