[llvm-bugs] [Bug 39391] New: Regression(r342175): ran out of registers during register allocation

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=39391

            Bug ID: 39391
           Summary: Regression(r342175): ran out of registers during
                    register allocation
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: peter at pcc.me.uk
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org

source_filename = "reflection2.ll"
target triple = "i686-unknown-linux-gnu"

@f = global i8* zeroinitializer

define void @g() #0 {
entry:
  %0 = load i8*, i8** @f
  %1 = load atomic i8, i8* %0 monotonic, align 1
  %d.h.h.h.h.h = bitcast i8* %0 to i64*
  %2 = load atomic i64, i64* %d.h.h.h.h.h monotonic, align 8
  %j.h = icmp eq i8 %1, 0
  br i1 %j.h, label %k.end, label %.

.:                                                ; preds = %., %entry
  %3 = call i32 @m()
  unreachable

k.end:                                            ; preds = %entry
  unreachable
}

declare i32 @m()

attributes #0 = { "no-frame-pointer-elim-non-leaf" }

$ llc reflection3.ll
LLVM ERROR: ran out of registers during register allocation

This regressed with r342175, although that change isn't directly to blame. That
change added a number of new register classes which changed heuristics used by
the machine scheduler, causing it to create an unsolvable problem for the
register allocator:

16B       %0:gr32 = MOV32rm $noreg, 1, $noreg, @f, $noreg :: (dereferenceable
load 4 from @f)
64B       $eax = MOV32r0 implicit-def dead $eflags
80B       $edx = MOV32r0 implicit-def dead $eflags
96B       $ecx = MOV32r0 implicit-def dead $eflags
112B      $ebx = MOV32r0 implicit-def dead $eflags
120B      %1:gr8 = MOV8rm %0:gr32, 1, $noreg, 0, $noreg :: (volatile load
monotonic 1 from %ir.0)
128B      LCMPXCHG8B %0:gr32, 1, $noreg, 0, $noreg, implicit-def dead $eax,
implicit-def dead $edx, implicit-def dead $eflags, implicit killed $eax,
implicit 
killed $ebx, implicit killed $ecx, implicit killed $edx :: (volatile load store
monotonic monotonic 8 on %ir.d.h.h.h.h.h, align 4)
144B      TEST8rr %1:gr8, %1:gr8, implicit-def $eflags
160B      JE_1 %bb.2, implicit killed $eflags
176B      JMP_1 %bb.1

Since all possible MOV8rm destination registers are live at line 120B, a
destination register cannot be chosen.

The moves into physical registers started out as copies (which we know to keep
together with the user -- see biasPhysRegCopy), but the Simple Register
Coalescing pass replaced them with moves.

-- 
You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20181023/f232c914/attachment.html>