[llvm-bugs] [Bug 36826] New: X86 should enable aggressive FMA formation (at least on skylake)

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https://bugs.llvm.org/show_bug.cgi?id=36826

            Bug ID: 36826
           Summary: X86 should enable aggressive FMA formation (at least
                    on skylake)
           Product: new-bugs
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: chandlerc at gmail.com
                CC: craig.topper at gmail.com, llvm-bugs at lists.llvm.org

On skylake, vector FP add has the same latency and throughput as FMA, so we
should definitely enable aggressive FMA formation.

On haswell and broadwell the issue is more complex. Add has shorter latency (3
cycles vs 5 cycles according to Agner) but half the throughput (one port rather
than two ports). I suspect that this is sufficient for it to be worth using FMA
everywhere, but we should benchmark to confirm.

If we can enable it everywhere, simply the following patch will suffice:
```
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -838,6 +838,9 @@ namespace llvm {
       return 2;
     }

+    /// Force aggressive FMA fusion.
+    bool enableAggressiveFMAFusion(EVT VT) const override { return true; }
+
     /// Return the value type to use for ISD::SETCC.
     EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
                            EVT VT) const override;
```

Otherwise, we'll need to factor the per-subtarget facility for this out of the
AArch64 backend and use it to enable this on a per-subtarget basis for the X86
backend as well.

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