[llvm-bugs] [Bug 37987] New: [X86] Improve optimization of X86ISD + FLAGS opcodes
llvm-bugs at lists.llvm.org
Fri Jun 29 05:22:21 PDT 2018
Bug ID: 37987
Summary: [X86] Improve optimization of X86ISD + FLAGS opcodes
OS: Windows NT
Component: Backend: X86
Assignee: unassignedbugs at nondot.org
Reporter: llvm-dev at redking.me.uk
CC: andrea.dibiagio at gmail.com, craig.topper at gmail.com,
lebedev.ri at gmail.com, llvm-bugs at lists.llvm.org,
spatel+llvm at rotateright.com
https://reviews.llvm.org/D48619 highlighted that we're not doing much to
optimize the ops once they are lowered to X86ISD + FLAGS opcodes:
// Arithmetic operations with FLAGS results.
ADD, SUB, ADC, SBB, SMUL,
INC, DEC, OR, XOR, AND,
We should at least manage basic constant folding, zero handling etc.
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