[llvm-bugs] [Bug 37690] New: Codegen can result in multiple sequential mfence instructions

via llvm-bugs llvm-bugs at lists.llvm.org
Tue Jun 5 08:00:48 PDT 2018


https://bugs.llvm.org/show_bug.cgi?id=37690

            Bug ID: 37690
           Summary: Codegen can result in multiple sequential mfence
                    instructions
           Product: clang
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: C++
          Assignee: unassignedclangbugs at nondot.org
          Reporter: redbeard0531 at gmail.com
                CC: dgregor at apple.com, llvm-bugs at lists.llvm.org

This is from an example to prove that atomic_thread_fence does not prevent the
compiler from optimizing non-escaped memory.

https://godbolt.org/g/WXFdPL

#include <utility>
#include <atomic>
struct Type {
    Type(Type&&)=default;
    int i;
};

Type func(Type t) {
    auto out = Type(Type(std::move(t)));
    std::atomic_thread_fence(std::memory_order_seq_cst);
    return out;
}

auto func2(Type t) { return func(func(func(func(std::move(t))))); }



func(Type): # @func(Type)
  mfence
  mov eax, edi
  ret
func2(Type): # @func2(Type)
  mfence
  mfence
  mfence
  mfence
  mov eax, edi
  ret

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