[llvm-bugs] [Bug 34152] New: [MC][GFX9] Many VOP3 opcodes should support integer clamping

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=34152

            Bug ID: 34152
           Summary: [MC][GFX9] Many VOP3 opcodes should support integer
                    clamping
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: AMDGPU
          Assignee: unassignedbugs at nondot.org
          Reporter: dpreobrazhensky at luxoft.com
                CC: llvm-bugs at lists.llvm.org

Full list of affected opcodes:

v_lerp_u8
v_mqsad_pk_u16_u8
v_msad_u8
v_sad_hi_u8
v_sad_u16
v_sad_u8
v_ashrrev_i64
v_mad_i64_i32
v_mad_u64_u32
v_qsad_pk_u16_u8
v_mad_i16
v_mad_u16
v_bfe_i32
v_bfe_u32
v_mad_i32_i24
v_mad_u32_u24
v_max3_i32
v_max3_u32
v_med3_i32
v_med3_u32
v_min3_i32
v_min3_u32
v_mbcnt_hi_u32_b32
v_mbcnt_lo_u32_b32
v_mul_hi_i32
v_mul_hi_u32
v_mul_lo_u32
v_sad_u32
v_mqsad_u32_u8

v_sub_u32_e64
v_subrev_u32_e64
v_max_i16_e64
v_max_i32_e64
v_max_u16_e64
v_max_u32_e64
v_min_i16_e64
v_min_i32_e64
v_min_u16_e64
v_min_u32_e64
v_mul_hi_i32_i24_e64
v_mul_hi_u32_u24_e64
v_mul_i32_i24_e64
v_mul_lo_u16_e64
v_mul_u32_u24_e64
v_sub_u16_e64
v_subrev_u16_e64
v_add_u16_e64
v_ashrrev_i32_e64
v_bcnt_u32_b32
v_cvt_pk_i16_i32
v_cvt_pk_u16_u32
v_ffbh_i32_e64
v_ffbh_u32_e64
v_ashrrev_i16_e64
v_add_u32_e64
v_addc_u32_e64
v_subb_u32_e64
v_subbrev_u32_e64

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