[llvm-bugs] [Bug 32487] New: [X86] Account for domain crossing penalties in the scheduling of SSE/AVX instructions
llvm-bugs at lists.llvm.org
Sat Apr 1 09:18:46 PDT 2017
Bug ID: 32487
Summary: [X86] Account for domain crossing penalties in the
scheduling of SSE/AVX instructions
Component: Backend: X86
Assignee: unassignedbugs at nondot.org
Reporter: llvm-dev at redking.me.uk
CC: llvm-bugs at lists.llvm.org
X86 domain crossing penalties are a lot more complicated than we account for,
each CPUs treat instructions from the same domain quite differently. We should
be trying to better model this to allow instruction selection to better tune
for particular CPUs.
[Bug 32325] [META][X86] Improve implementation and use of X86 scheduler models
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