[LLVMbugs] [Bug 20555] New: invalid instruction selection (mule is not permitted within an IT block)

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Tue Aug 5 15:38:50 PDT 2014


            Bug ID: 20555
           Summary: invalid instruction selection (mule is not permitted
                    within an IT block)
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: compnerd at compnerd.org
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

An invalid instruction is selected for the following function:

int function(int i, int j) {
  if (i == j)
    i = i * j;
  return i;

The equivalent IR for this:

define arm_aapcs_vfpcc i32 @function(i32 %i, i32 %j) {
  %cmp = icmp eq i32 %i, %j
  br i1 %cmp, label %if.then, label %if.end

if.then:                                          ; preds = %entry
  %mul = mul nsw i32 %i, %i
  br label %if.end

if.end:                                           ; preds = %if.then, %entry
  %i.addr.0 = phi i32 [ %mul, %if.then ], [ %i, %entry ]
  ret i32 %i.addr.0

Using llc -mtriple thumbv7-eabi -arm-restrict-it -filetype asm -o - %s
generates the following:

  cmp     r0, r1
  it      eq
  mulseq  r0, r0, r0
  bx      lr

While the logic is correct, the problem is the mulseq which is in an IT block. 
The ARM Architecture Reference Manual states:

In the Thumb instruction set, S can be specified only if both <Rn> and <Rm> are
R0-R7 and the instruction is outside an IT block.

This occurs as a result of If Convert + Thumb2SizeReduction.  Disabling the
Triangle False (-disable-ifcvt-triangle-false) conversion prevents this from
occurring.  It may be the if conversion is changing the liveness state of CPSR.

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