[LLVMbugs] [Bug 18261] New: Register coalescer asserts with 'LastMI && "Range must end at a proper instruction"'
bugzilla-daemon at llvm.org
bugzilla-daemon at llvm.org
Mon Dec 16 09:19:04 PST 2013
http://llvm.org/bugs/show_bug.cgi?id=18261
Bug ID: 18261
Summary: Register coalescer asserts with 'LastMI && "Range must
end at a proper instruction"'
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Register Allocator
Assignee: unassignedbugs at nondot.org
Reporter: james.molloy at arm.com
CC: llvmbugs at cs.uiuc.edu
Classification: Unclassified
Created attachment 11741
--> http://llvm.org/bugs/attachment.cgi?id=11741&action=edit
Bug reproducer
The attached testcase causes the register coalescer to fall over:
llc: ../lib/CodeGen/RegisterCoalescer.cpp:1834: bool
{anonymous}::JoinVals::resolveConflicts({anonymous}::JoinVals&): Assertion
`LastMI && "Range must end at a proper instruction"' failed.
Reproduce with `llc reduced.ll`
Debug output:
********** SIMPLE REGISTER COALESCING **********
********** Function: entry.thunk
********** JOINING INTERVALS ***********
cond.true107.state0.i:
cond.end103.state0.i:
352B %vreg5<def> = COPY %vreg40; QPR:%vreg5 DPair:%vreg40
Considering merging to QPR with %vreg40 in %vreg5
RHS = %vreg5 [352r,448r:0) 0 at 352r
LHS = %vreg40 [16r,288B:0)[336B,384r:0) 0 at 16r
merge %vreg5:0 at 352r into %vreg40:0 at 16r --> @16r
erased: 352r %vreg5<def> = COPY %vreg40; QPR:%vreg5 DPair:%vreg40
AllocationOrder(QPR) = [ %Q8 %Q9 %Q10 %Q11 %Q12 %Q13 %Q14 %Q15 %Q0 %Q1 %Q2 %Q3
%Q4 %Q5 %Q6 %Q7 ]
updated: 448B %vreg29<def,dead> = COPY %vreg40; QPR:%vreg29,%vreg40
Joined. Result = %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
368B %vreg3<def> = COPY %vreg40; QPR:%vreg3,%vreg40
Considering merging to QPR with %vreg40 in %vreg3
RHS = %vreg3 [368r,416r:0) 0 at 368r
LHS = %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
merge %vreg3:0 at 368r into %vreg40:0 at 16r --> @16r
erased: 368r %vreg3<def> = COPY %vreg40; QPR:%vreg3,%vreg40
updated: 416B %vreg27<def,dead> = COPY %vreg40; QPR:%vreg27,%vreg40
Joined. Result = %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
384B %vreg0<def> = COPY %vreg40; QPR:%vreg0,%vreg40
Considering merging to QPR with %vreg40 in %vreg0
RHS = %vreg0 [384r,400r:0) 0 at 384r
LHS = %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
merge %vreg0:0 at 384r into %vreg40:0 at 16r --> @16r
erased: 384r %vreg0<def> = COPY %vreg40; QPR:%vreg0,%vreg40
updated: 400B %vreg24<def,dead> = COPY %vreg40; QPR:%vreg24,%vreg40
Joined. Result = %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
400B %vreg24<def,dead> = COPY %vreg40; QPR:%vreg24,%vreg40
Copy is dead.
Deleting dead def 400r %vreg24<def,dead> = COPY %vreg40; QPR:%vreg24,%vreg40
Shrink: %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
live-in at 336B
Shrunk: %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
416B %vreg27<def,dead> = COPY %vreg40; QPR:%vreg27,%vreg40
Copy is dead.
Deleting dead def 416r %vreg27<def,dead> = COPY %vreg40; QPR:%vreg27,%vreg40
Shrink: %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
live-in at 336B
Shrunk: %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
432B %vreg28<def,dead> = COPY %vreg4; QPR:%vreg28,%vreg4
Copy is dead.
Deleting dead def 432r %vreg28<def,dead> = COPY %vreg4; QPR:%vreg28,%vreg4
Shrink: %vreg4 [32r,288B:0)[336B,432r:0) 0 at 32r
Shrunk: %vreg4 [32r,80r:0) 0 at 32r
448B %vreg29<def,dead> = COPY %vreg40; QPR:%vreg29,%vreg40
Copy is dead.
Deleting dead def 448r %vreg29<def,dead> = COPY %vreg40; QPR:%vreg29,%vreg40
Shrink: %vreg40 [16r,288B:0)[336B,448r:0) 0 at 16r
Shrunk: %vreg40 [16r,128r:0) 0 at 16r
Marshall:
48B %vreg42<def> = COPY %vreg4:dsub_0; DPR:%vreg42 QPR:%vreg4
Considering merging to QPR with %vreg42 in %vreg4:dsub_0
RHS = %vreg42 [48r,160r:0) 0 at 48r
LHS = %vreg4 [32r,80r:0) 0 at 32r
merge %vreg42:0 at 48r into %vreg4:0 at 32r --> @32r
erased: 48r %vreg42<def> = COPY %vreg4:dsub_0; DPR:%vreg42
QPR:%vreg4
updated: 96B %vreg45:dsub_0<def,read-undef> = COPY %vreg4:dsub_0;
QPR:%vreg45,%vreg4
updated: 112B %vreg45:dsub_1<def> = COPY %vreg4:dsub_0;
QPR:%vreg45,%vreg4
updated: 160B %vreg47:dsub_1<def> = COPY %vreg4:dsub_0;
QPR:%vreg47,%vreg4
Joined. Result = %vreg4 [32r,160r:0) 0 at 32r
64B %vreg43<def> = COPY %vreg40:dsub_0; DPR:%vreg43 QPR:%vreg40
Considering merging to QPR with %vreg43 in %vreg40:dsub_0
RHS = %vreg43 [64r,176r:0) 0 at 64r
LHS = %vreg40 [16r,128r:0) 0 at 16r
merge %vreg43:0 at 64r into %vreg40:0 at 16r --> @16r
erased: 64r %vreg43<def> = COPY %vreg40:dsub_0; DPR:%vreg43
QPR:%vreg40
updated: 144B %vreg47:dsub_0<def,read-undef> = COPY %vreg40:dsub_0;
QPR:%vreg47,%vreg40
updated: 176B %vreg48:dsub_0<def,read-undef> = COPY %vreg40:dsub_0;
QPR:%vreg48,%vreg40
Joined. Result = %vreg40 [16r,176r:0) 0 at 16r
80B %vreg44<def> = COPY %vreg4:dsub_1; DPR:%vreg44 QPR:%vreg4
Considering merging to QPR with %vreg44 in %vreg4:dsub_1
RHS = %vreg44 [80r,208r:0) 0 at 80r
LHS = %vreg4 [32r,160r:0) 0 at 32r
merge %vreg44:0 at 80r into %vreg4:0 at 32r --> @32r
erased: 80r %vreg44<def> = COPY %vreg4:dsub_1; DPR:%vreg44
QPR:%vreg4
updated: 192B %vreg48:dsub_1<def> = COPY %vreg4:dsub_1;
QPR:%vreg48,%vreg4
updated: 208B %vreg57:dsub_0<def,read-undef> = COPY %vreg4:dsub_1;
QPR:%vreg57,%vreg4
Joined. Result = %vreg4 [32r,208r:0) 0 at 32r
96B %vreg45:dsub_0<def,read-undef> = COPY %vreg4:dsub_0; QPR:%vreg45,%vreg4
Considering merging to QPR with %vreg4 in %vreg45
RHS = %vreg4 [32r,208r:0) 0 at 32r
LHS = %vreg45 [96r,112r:1)[112r,112d:0) 0 at 112r 1 at 96r
merge %vreg45:1 at 96r into %vreg4:0 at 32r --> @32r
conflict at %vreg45:0 at 112r
taints local %vreg4:0 at 32r to 208r
tainted lanes used by: %vreg48:dsub_1<def> = COPY %vreg4:dsub_1;
QPR:%vreg48,%vreg4
Interference!
112B %vreg45:dsub_1<def> = COPY %vreg4:dsub_0; QPR:%vreg45,%vreg4
Not coalescable.
128B %vreg46<def> = COPY %vreg40:dsub_1; DPR:%vreg46 QPR:%vreg40
Considering merging to QPR with %vreg46 in %vreg40:dsub_1
RHS = %vreg46 [128r,224r:0) 0 at 128r
LHS = %vreg40 [16r,176r:0) 0 at 16r
merge %vreg46:0 at 128r into %vreg40:0 at 16r --> @16r
erased: 128r %vreg46<def> = COPY %vreg40:dsub_1; DPR:%vreg46
QPR:%vreg40
updated: 224B %vreg57:dsub_1<def> = COPY %vreg40:dsub_1;
QPR:%vreg57,%vreg40
Joined. Result = %vreg40 [16r,224r:0) 0 at 16r
144B %vreg47:dsub_0<def,read-undef> = COPY %vreg40:dsub_0;
QPR:%vreg47,%vreg40
Considering merging to QPR with %vreg40 in %vreg47
RHS = %vreg40 [16r,224r:0) 0 at 16r
LHS = %vreg47 [144r,160r:1)[160r,160d:0) 0 at 160r 1 at 144r
merge %vreg47:1 at 144r into %vreg40:0 at 16r --> @16r
conflict at %vreg47:0 at 160r
taints local %vreg40:0 at 16r to 224r
tainted lanes used by: %vreg57:dsub_1<def> = COPY %vreg40:dsub_1;
QPR:%vreg57,%vreg40
Interference!
160B %vreg47:dsub_1<def> = COPY %vreg4:dsub_0; QPR:%vreg47,%vreg4
Not coalescable.
176B %vreg48:dsub_0<def,read-undef> = COPY %vreg40:dsub_0;
QPR:%vreg48,%vreg40
Considering merging to QPR with %vreg40 in %vreg48
RHS = %vreg40 [16r,224r:0) 0 at 16r
LHS = %vreg48 [176r,192r:1)[192r,192d:0) 0 at 192r 1 at 176r
merge %vreg48:1 at 176r into %vreg40:0 at 16r --> @16r
conflict at %vreg48:0 at 192r
taints local %vreg40:0 at 16r to 224r
tainted lanes used by: %vreg57:dsub_1<def> = COPY %vreg40:dsub_1;
QPR:%vreg57,%vreg40
Interference!
192B %vreg48:dsub_1<def> = COPY %vreg4:dsub_1; QPR:%vreg48,%vreg4
Considering merging to QPR with %vreg4 in %vreg48
RHS = %vreg4 [32r,208r:0) 0 at 32r
LHS = %vreg48 [176r,192r:1)[192r,192d:0) 0 at 192r 1 at 176r
merge %vreg48:0 at 192r into %vreg4:0 at 32r --> @32r
conflict at %vreg48:1 at 176r
taints local %vreg4:0 at 32r to 208r
pruned all of %vreg48 at 192r: %vreg48 [176r,192r:1)[192r,192d:0)
0 at 192r 1 at 176r
pruned %vreg4 at 176r: %vreg4 [32r,176r:0) 0 at 32r
erased: 192r %vreg48:dsub_1<def> = COPY %vreg4:dsub_1;
QPR:%vreg48,%vreg4
restoring liveness to 2 points: %vreg48
[32r,176r:0)[176r,192r:1)[192r,192d:0) 0 at 32r 1 at 176r
updated: 32B %vreg48<def> = VMOVv4i32 0, pred:14, pred:%noreg;
QPR:%vreg48
updated: 96B %vreg45:dsub_0<def,read-undef> = COPY %vreg48:dsub_0;
QPR:%vreg45,%vreg48
updated: 112B %vreg45:dsub_1<def> = COPY %vreg48:dsub_0;
QPR:%vreg45,%vreg48
updated: 160B %vreg47:dsub_1<def> = COPY %vreg48:dsub_0;
QPR:%vreg47,%vreg48
updated: 208B %vreg57:dsub_0<def,read-undef> = COPY %vreg48:dsub_1;
QPR:%vreg57,%vreg48
Joined. Result = %vreg48 [32r,176r:0)[176r,192r:1)[192r,208r:0) 0 at 32r
1 at 176r
208B %vreg57:dsub_0<def,read-undef> = COPY %vreg48:dsub_1;
QPR:%vreg57,%vreg48
Not coalescable.
224B %vreg57:dsub_1<def> = COPY %vreg40:dsub_1; QPR:%vreg57,%vreg40
Considering merging to QPR with %vreg40 in %vreg57
RHS = %vreg40 [16r,224r:0) 0 at 16r
LHS = %vreg57 [208r,224r:1)[224r,224d:0) 0 at 224r 1 at 208r
merge %vreg57:0 at 224r into %vreg40:0 at 16r --> @16r
conflict at %vreg57:1 at 208r
taints local %vreg40:0 at 16r to 224r
pruned all of %vreg57 at 224r: %vreg57 [208r,224r:1)[224r,224d:0)
0 at 224r 1 at 208r
pruned %vreg40 at 208r: %vreg40 [16r,208r:0) 0 at 16r
erased: 224r %vreg57:dsub_1<def> = COPY %vreg40:dsub_1;
QPR:%vreg57,%vreg40
restoring liveness to 2 points: %vreg57
[16r,208r:0)[208r,224r:1)[224r,224d:0) 0 at 16r 1 at 208r
updated: 16B %vreg57<def> = VLD1q64 %vreg41<undef>, 16, pred:14,
pred:%noreg; mem:LD16[undef(align=128)+112](align=16) QPR:%vreg57 GPR:%vreg41
updated: 144B %vreg47:dsub_0<def,read-undef> = COPY %vreg57:dsub_0;
QPR:%vreg47,%vreg57
updated: 176B %vreg48:dsub_0<def> = COPY %vreg57:dsub_0;
QPR:%vreg48,%vreg57
Joined. Result = %vreg57 [16r,208r:0)[208r,224r:1)[224r,224d:0) 0 at 16r
1 at 208r
cond.end124.state0.i:
96B %vreg45:dsub_0<def,read-undef> = COPY %vreg48:dsub_0;
QPR:%vreg45,%vreg48
Considering merging to QPR with %vreg48 in %vreg45
RHS = %vreg48 [32r,176r:0)[176r,192r:1)[192r,208r:0) 0 at 32r 1 at 176r
LHS = %vreg45 [96r,112r:1)[112r,112d:0) 0 at 112r 1 at 96r
merge %vreg45:1 at 96r into %vreg48:0 at 32r --> @32r
conflict at %vreg45:0 at 112r
taints local %vreg48:0 at 32r to 176r
taints local %vreg48:1 at 176r to 192r
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