[llvm-branch-commits] [mlir] [MLIR][LLVM][SROA] Support incorrectly typed memory accesses (PR #85813)

Tobias Gysi via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue Mar 19 11:30:43 PDT 2024


================
@@ -384,16 +468,17 @@ bool LLVM::GEPOp::canRewire(const DestructurableMemorySlot &slot,
   // dynamic indices can never be properly rewired.
   if (!getDynamicIndices().empty())
     return false;
+  //// TODO: This is not necessary, I think.
+  // if (slot.elemType != getElemType())
+  //   return false;
----------------
gysit wrote:

This seem to be a debug left over and the condition seems to be checked above?

Maybe not in this PR, but should we use the data layout here as well instead of checking the element type. I.e. we could compute the offset of the GEP and then check if the offset points to the beginning of a subelement (of the slot and maybe also of a nested slot).

https://github.com/llvm/llvm-project/pull/85813


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