[llvm-branch-commits] [llvm] PR for llvm/llvm-project#80715 (PR #80716)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Feb 5 09:59:31 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: None (llvmbot)
<details>
<summary>Changes</summary>
resolves llvm/llvm-project#<!-- -->80715
---
Patch is 295.23 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/80716.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (+1)
- (modified) llvm/test/CodeGen/AMDGPU/div_i128.ll (+5443-6)
- (added) llvm/test/CodeGen/AMDGPU/div_v2i128.ll (+25)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 55d95154c75878..2af53a664ff173 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -577,6 +577,7 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM,
ISD::AssertSext, ISD::INTRINSIC_WO_CHAIN});
setMaxAtomicSizeInBitsSupported(64);
+ setMaxDivRemBitWidthSupported(64);
}
bool AMDGPUTargetLowering::mayIgnoreSignedZero(SDValue Op) const {
diff --git a/llvm/test/CodeGen/AMDGPU/div_i128.ll b/llvm/test/CodeGen/AMDGPU/div_i128.ll
index 4aa97c57cbd9c2..5296ad3ab51d31 100644
--- a/llvm/test/CodeGen/AMDGPU/div_i128.ll
+++ b/llvm/test/CodeGen/AMDGPU/div_i128.ll
@@ -1,9 +1,5446 @@
-; RUN: not --crash llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck -check-prefix=SDAG-ERR %s
-; RUN: not --crash llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -o - %s 2>&1 | FileCheck -check-prefix=GISEL-ERR %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -o - %s | FileCheck -check-prefixes=GFX9,GFX9-SDAG %s
+; RUN: llc -O0 -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -o - %s | FileCheck -check-prefixes=GFX9-O0,GFX9-SDAG-O0 %s
+
+; FIXME: GlobalISel missing the power-of-2 cases in legalization. https://github.com/llvm/llvm-project/issues/80671
+; xUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -o - %s | FileCheck -check-prefixes=GFX9,GFX9 %s
+; xUN: llc -O0 -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -o - %s | FileCheck -check-prefixes=GFX9-O0,GFX9-O0 %s
-; SDAG-ERR: LLVM ERROR: unsupported libcall legalization
-; GISEL-ERR: LLVM ERROR: unable to legalize instruction: %{{[0-9]+}}:_(s128) = G_SDIV %{{[0-9]+}}:_, %{{[0-9]+}}:_ (in function: v_sdiv_i128_vv)
define i128 @v_sdiv_i128_vv(i128 %lhs, i128 %rhs) {
- %shl = sdiv i128 %lhs, %rhs
- ret i128 %shl
+; GFX9-LABEL: v_sdiv_i128_vv:
+; GFX9: ; %bb.0: ; %_udiv-special-cases
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: v_ashrrev_i32_e32 v16, 31, v3
+; GFX9-NEXT: v_xor_b32_e32 v0, v16, v0
+; GFX9-NEXT: v_xor_b32_e32 v1, v16, v1
+; GFX9-NEXT: v_sub_co_u32_e32 v8, vcc, v0, v16
+; GFX9-NEXT: v_xor_b32_e32 v2, v16, v2
+; GFX9-NEXT: v_subb_co_u32_e32 v9, vcc, v1, v16, vcc
+; GFX9-NEXT: v_ashrrev_i32_e32 v17, 31, v7
+; GFX9-NEXT: v_xor_b32_e32 v3, v16, v3
+; GFX9-NEXT: v_subb_co_u32_e32 v10, vcc, v2, v16, vcc
+; GFX9-NEXT: v_subb_co_u32_e32 v11, vcc, v3, v16, vcc
+; GFX9-NEXT: v_xor_b32_e32 v3, v17, v4
+; GFX9-NEXT: v_xor_b32_e32 v2, v17, v5
+; GFX9-NEXT: v_sub_co_u32_e32 v20, vcc, v3, v17
+; GFX9-NEXT: v_xor_b32_e32 v0, v17, v6
+; GFX9-NEXT: v_subb_co_u32_e32 v21, vcc, v2, v17, vcc
+; GFX9-NEXT: v_xor_b32_e32 v1, v17, v7
+; GFX9-NEXT: v_subb_co_u32_e32 v0, vcc, v0, v17, vcc
+; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v17, vcc
+; GFX9-NEXT: v_or_b32_e32 v3, v21, v1
+; GFX9-NEXT: v_or_b32_e32 v2, v20, v0
+; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[2:3]
+; GFX9-NEXT: v_or_b32_e32 v3, v9, v11
+; GFX9-NEXT: v_or_b32_e32 v2, v8, v10
+; GFX9-NEXT: v_cmp_eq_u64_e64 s[4:5], 0, v[2:3]
+; GFX9-NEXT: v_ffbh_u32_e32 v2, v0
+; GFX9-NEXT: v_add_u32_e32 v2, 32, v2
+; GFX9-NEXT: v_ffbh_u32_e32 v3, v1
+; GFX9-NEXT: v_min_u32_e32 v2, v2, v3
+; GFX9-NEXT: v_ffbh_u32_e32 v3, v20
+; GFX9-NEXT: v_add_u32_e32 v3, 32, v3
+; GFX9-NEXT: v_ffbh_u32_e32 v4, v21
+; GFX9-NEXT: v_min_u32_e32 v3, v3, v4
+; GFX9-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
+; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, 64, v3
+; GFX9-NEXT: v_addc_co_u32_e64 v4, s[6:7], 0, 0, vcc
+; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]
+; GFX9-NEXT: v_ffbh_u32_e32 v5, v11
+; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
+; GFX9-NEXT: v_ffbh_u32_e32 v3, v10
+; GFX9-NEXT: v_add_u32_e32 v3, 32, v3
+; GFX9-NEXT: v_min_u32_e32 v3, v3, v5
+; GFX9-NEXT: v_ffbh_u32_e32 v5, v8
+; GFX9-NEXT: v_add_u32_e32 v5, 32, v5
+; GFX9-NEXT: v_ffbh_u32_e32 v6, v9
+; GFX9-NEXT: v_min_u32_e32 v5, v5, v6
+; GFX9-NEXT: v_cndmask_b32_e64 v4, v4, 0, vcc
+; GFX9-NEXT: v_add_co_u32_e32 v5, vcc, 64, v5
+; GFX9-NEXT: v_addc_co_u32_e64 v6, s[6:7], 0, 0, vcc
+; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[10:11]
+; GFX9-NEXT: s_mov_b64 s[6:7], 0x7f
+; GFX9-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc
+; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, 0, vcc
+; GFX9-NEXT: v_sub_co_u32_e32 v2, vcc, v2, v3
+; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v4, v6, vcc
+; GFX9-NEXT: v_mov_b32_e32 v5, 0
+; GFX9-NEXT: v_subbrev_co_u32_e32 v4, vcc, 0, v5, vcc
+; GFX9-NEXT: v_subbrev_co_u32_e32 v5, vcc, 0, v5, vcc
+; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[2:3]
+; GFX9-NEXT: v_mov_b32_e32 v18, v16
+; GFX9-NEXT: v_cndmask_b32_e64 v6, 0, 1, vcc
+; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v19, v17
+; GFX9-NEXT: v_cndmask_b32_e64 v7, 0, 1, vcc
+; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[4:5]
+; GFX9-NEXT: v_cndmask_b32_e32 v6, v7, v6, vcc
+; GFX9-NEXT: v_and_b32_e32 v6, 1, v6
+; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6
+; GFX9-NEXT: v_xor_b32_e32 v6, 0x7f, v2
+; GFX9-NEXT: v_or_b32_e32 v7, v3, v5
+; GFX9-NEXT: v_or_b32_e32 v6, v6, v4
+; GFX9-NEXT: s_or_b64 s[4:5], s[4:5], vcc
+; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[6:7]
+; GFX9-NEXT: s_xor_b64 s[6:7], s[4:5], -1
+; GFX9-NEXT: v_cndmask_b32_e64 v13, v11, 0, s[4:5]
+; GFX9-NEXT: v_cndmask_b32_e64 v12, v10, 0, s[4:5]
+; GFX9-NEXT: v_cndmask_b32_e64 v7, v9, 0, s[4:5]
+; GFX9-NEXT: v_cndmask_b32_e64 v6, v8, 0, s[4:5]
+; GFX9-NEXT: s_and_b64 s[4:5], s[6:7], vcc
+; GFX9-NEXT: s_and_saveexec_b64 s[8:9], s[4:5]
+; GFX9-NEXT: s_cbranch_execz .LBB0_6
+; GFX9-NEXT: ; %bb.1: ; %udiv-bb1
+; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, 1, v2
+; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, 0, v3, vcc
+; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, 0, v4, vcc
+; GFX9-NEXT: v_sub_u32_e32 v7, 0x7f, v2
+; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, 0, v5, vcc
+; GFX9-NEXT: v_sub_u32_e32 v12, 64, v7
+; GFX9-NEXT: v_or_b32_e32 v4, v23, v25
+; GFX9-NEXT: v_or_b32_e32 v3, v22, v24
+; GFX9-NEXT: v_lshlrev_b64 v[5:6], v7, v[10:11]
+; GFX9-NEXT: v_lshrrev_b64 v[12:13], v12, v[8:9]
+; GFX9-NEXT: v_sub_u32_e32 v2, 63, v2
+; GFX9-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[3:4]
+; GFX9-NEXT: v_lshlrev_b64 v[2:3], v2, v[8:9]
+; GFX9-NEXT: v_or_b32_e32 v4, v6, v13
+; GFX9-NEXT: v_or_b32_e32 v5, v5, v12
+; GFX9-NEXT: v_cmp_gt_u32_e64 s[4:5], 64, v7
+; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[4:5]
+; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[4:5]
+; GFX9-NEXT: v_lshlrev_b64 v[4:5], v7, v[8:9]
+; GFX9-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v7
+; GFX9-NEXT: v_mov_b32_e32 v6, 0
+; GFX9-NEXT: v_mov_b32_e32 v12, 0
+; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v11, s[6:7]
+; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v10, s[6:7]
+; GFX9-NEXT: v_cndmask_b32_e64 v5, 0, v5, s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v7, 0
+; GFX9-NEXT: v_mov_b32_e32 v13, 0
+; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, v4, s[4:5]
+; GFX9-NEXT: s_and_saveexec_b64 s[4:5], vcc
+; GFX9-NEXT: s_xor_b64 s[6:7], exec, s[4:5]
+; GFX9-NEXT: s_cbranch_execz .LBB0_5
+; GFX9-NEXT: ; %bb.2: ; %udiv-preheader
+; GFX9-NEXT: v_sub_u32_e32 v12, 64, v22
+; GFX9-NEXT: v_lshrrev_b64 v[6:7], v22, v[8:9]
+; GFX9-NEXT: v_lshlrev_b64 v[12:13], v12, v[10:11]
+; GFX9-NEXT: v_cmp_gt_u32_e32 vcc, 64, v22
+; GFX9-NEXT: v_or_b32_e32 v12, v6, v12
+; GFX9-NEXT: v_subrev_u32_e32 v6, 64, v22
+; GFX9-NEXT: v_or_b32_e32 v13, v7, v13
+; GFX9-NEXT: v_lshrrev_b64 v[6:7], v6, v[10:11]
+; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v22
+; GFX9-NEXT: v_cndmask_b32_e32 v7, v7, v13, vcc
+; GFX9-NEXT: v_cndmask_b32_e64 v9, v7, v9, s[4:5]
+; GFX9-NEXT: v_cndmask_b32_e32 v12, v6, v12, vcc
+; GFX9-NEXT: v_lshrrev_b64 v[6:7], v22, v[10:11]
+; GFX9-NEXT: v_cndmask_b32_e64 v8, v12, v8, s[4:5]
+; GFX9-NEXT: v_cndmask_b32_e32 v11, 0, v7, vcc
+; GFX9-NEXT: v_cndmask_b32_e32 v10, 0, v6, vcc
+; GFX9-NEXT: v_add_co_u32_e32 v26, vcc, -1, v20
+; GFX9-NEXT: v_addc_co_u32_e32 v27, vcc, -1, v21, vcc
+; GFX9-NEXT: v_addc_co_u32_e32 v28, vcc, -1, v0, vcc
+; GFX9-NEXT: v_mov_b32_e32 v14, 0
+; GFX9-NEXT: v_mov_b32_e32 v12, 0
+; GFX9-NEXT: v_addc_co_u32_e32 v29, vcc, -1, v1, vcc
+; GFX9-NEXT: s_mov_b64 s[4:5], 0
+; GFX9-NEXT: v_mov_b32_e32 v15, 0
+; GFX9-NEXT: v_mov_b32_e32 v13, 0
+; GFX9-NEXT: v_mov_b32_e32 v7, 0
+; GFX9-NEXT: .LBB0_3: ; %udiv-do-while
+; GFX9-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX9-NEXT: v_lshrrev_b32_e32 v6, 31, v5
+; GFX9-NEXT: v_lshlrev_b64 v[4:5], 1, v[4:5]
+; GFX9-NEXT: v_lshlrev_b64 v[10:11], 1, v[10:11]
+; GFX9-NEXT: v_or_b32_e32 v4, v14, v4
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 31, v9
+; GFX9-NEXT: v_lshlrev_b64 v[8:9], 1, v[8:9]
+; GFX9-NEXT: v_or_b32_e32 v10, v10, v14
+; GFX9-NEXT: v_lshrrev_b32_e32 v14, 31, v3
+; GFX9-NEXT: v_or_b32_e32 v8, v8, v14
+; GFX9-NEXT: v_sub_co_u32_e32 v14, vcc, v26, v8
+; GFX9-NEXT: v_subb_co_u32_e32 v14, vcc, v27, v9, vcc
+; GFX9-NEXT: v_subb_co_u32_e32 v14, vcc, v28, v10, vcc
+; GFX9-NEXT: v_subb_co_u32_e32 v14, vcc, v29, v11, vcc
+; GFX9-NEXT: v_ashrrev_i32_e32 v30, 31, v14
+; GFX9-NEXT: v_and_b32_e32 v14, v30, v20
+; GFX9-NEXT: v_sub_co_u32_e32 v8, vcc, v8, v14
+; GFX9-NEXT: v_and_b32_e32 v14, v30, v21
+; GFX9-NEXT: v_subb_co_u32_e32 v9, vcc, v9, v14, vcc
+; GFX9-NEXT: v_and_b32_e32 v14, v30, v0
+; GFX9-NEXT: v_subb_co_u32_e32 v10, vcc, v10, v14, vcc
+; GFX9-NEXT: v_and_b32_e32 v14, v30, v1
+; GFX9-NEXT: v_subb_co_u32_e32 v11, vcc, v11, v14, vcc
+; GFX9-NEXT: v_add_co_u32_e32 v22, vcc, -1, v22
+; GFX9-NEXT: v_addc_co_u32_e32 v23, vcc, -1, v23, vcc
+; GFX9-NEXT: v_addc_co_u32_e32 v24, vcc, -1, v24, vcc
+; GFX9-NEXT: v_addc_co_u32_e32 v25, vcc, -1, v25, vcc
+; GFX9-NEXT: v_or_b32_e32 v5, v15, v5
+; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3]
+; GFX9-NEXT: v_or_b32_e32 v14, v22, v24
+; GFX9-NEXT: v_or_b32_e32 v15, v23, v25
+; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[14:15]
+; GFX9-NEXT: v_or3_b32 v2, v2, v6, v12
+; GFX9-NEXT: v_and_b32_e32 v6, 1, v30
+; GFX9-NEXT: v_mov_b32_e32 v15, v7
+; GFX9-NEXT: v_or3_b32 v3, v3, 0, v13
+; GFX9-NEXT: s_or_b64 s[4:5], vcc, s[4:5]
+; GFX9-NEXT: v_mov_b32_e32 v14, v6
+; GFX9-NEXT: s_andn2_b64 exec, exec, s[4:5]
+; GFX9-NEXT: s_cbranch_execnz .LBB0_3
+; GFX9-NEXT: ; %bb.4: ; %Flow
+; GFX9-NEXT: s_or_b64 exec, exec, s[4:5]
+; GFX9-NEXT: .LBB0_5: ; %Flow2
+; GFX9-NEXT: s_or_b64 exec, exec, s[6:7]
+; GFX9-NEXT: v_lshlrev_b64 v[0:1], 1, v[4:5]
+; GFX9-NEXT: v_lshlrev_b64 v[2:3], 1, v[2:3]
+; GFX9-NEXT: v_lshrrev_b32_e32 v4, 31, v5
+; GFX9-NEXT: v_or3_b32 v13, v3, 0, v13
+; GFX9-NEXT: v_or3_b32 v12, v2, v4, v12
+; GFX9-NEXT: v_or_b32_e32 v7, v7, v1
+; GFX9-NEXT: v_or_b32_e32 v6, v6, v0
+; GFX9-NEXT: .LBB0_6: ; %Flow3
+; GFX9-NEXT: s_or_b64 exec, exec, s[8:9]
+; GFX9-NEXT: v_xor_b32_e32 v2, v17, v16
+; GFX9-NEXT: v_xor_b32_e32 v3, v19, v18
+; GFX9-NEXT: v_xor_b32_e32 v0, v6, v2
+; GFX9-NEXT: v_xor_b32_e32 v1, v7, v3
+; GFX9-NEXT: v_sub_co_u32_e32 v0, vcc, v0, v2
+; GFX9-NEXT: v_xor_b32_e32 v5, v12, v2
+; GFX9-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v3, vcc
+; GFX9-NEXT: v_xor_b32_e32 v4, v13, v3
+; GFX9-NEXT: v_subb_co_u32_e32 v2, vcc, v5, v2, vcc
+; GFX9-NEXT: v_subb_co_u32_e32 v3, vcc, v4, v3, vcc
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX9-O0-LABEL: v_sdiv_i128_vv:
+; GFX9-O0: ; %bb.0: ; %_udiv-special-cases
+; GFX9-O0-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-O0-NEXT: s_xor_saveexec_b64 s[4:5], -1
+; GFX9-O0-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:320 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:324 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v8, off, s[0:3], s32 offset:328 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v16, off, s[0:3], s32 offset:332 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: s_mov_b64 exec, s[4:5]
+; GFX9-O0-NEXT: ; implicit-def: $vgpr8 : SGPR spill to VGPR lane
+; GFX9-O0-NEXT: buffer_store_dword v7, off, s[0:3], s32 offset:92 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:88 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: v_mov_b32_e32 v6, v5
+; GFX9-O0-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:92 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: v_mov_b32_e32 v7, v4
+; GFX9-O0-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: v_mov_b32_e32 v4, v2
+; GFX9-O0-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:88 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: v_mov_b32_e32 v3, v1
+; GFX9-O0-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:84 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: v_mov_b32_e32 v9, v0
+; GFX9-O0-NEXT: s_or_saveexec_b64 s[18:19], -1
+; GFX9-O0-NEXT: buffer_load_dword v0, off, s[0:3], s32 ; 4-byte Folded Reload
+; GFX9-O0-NEXT: s_mov_b64 exec, s[18:19]
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v8, v6
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v10, v3
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec
+; GFX9-O0-NEXT: s_waitcnt vmcnt(4)
+; GFX9-O0-NEXT: v_mov_b32_e32 v3, v5
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec
+; GFX9-O0-NEXT: s_waitcnt vmcnt(1)
+; GFX9-O0-NEXT: v_mov_b32_e32 v5, v1
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4_sgpr5
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4_sgpr5
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4_sgpr5
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4_sgpr5
+; GFX9-O0-NEXT: s_mov_b32 s4, 63
+; GFX9-O0-NEXT: v_mov_b32_e32 v12, v5
+; GFX9-O0-NEXT: v_mov_b32_e32 v11, v4
+; GFX9-O0-NEXT: v_ashrrev_i64 v[13:14], s4, v[11:12]
+; GFX9-O0-NEXT: v_mov_b32_e32 v12, v3
+; GFX9-O0-NEXT: v_mov_b32_e32 v11, v2
+; GFX9-O0-NEXT: v_ashrrev_i64 v[11:12], s4, v[11:12]
+; GFX9-O0-NEXT: v_mov_b32_e32 v1, v5
+; GFX9-O0-NEXT: v_mov_b32_e32 v6, v14
+; GFX9-O0-NEXT: v_xor_b32_e64 v1, v6, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v5, v4
+; GFX9-O0-NEXT: v_mov_b32_e32 v4, v13
+; GFX9-O0-NEXT: v_xor_b32_e64 v13, v4, v5
+; GFX9-O0-NEXT: ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v14, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v1, v10
+; GFX9-O0-NEXT: v_xor_b32_e64 v1, v6, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v5, v9
+; GFX9-O0-NEXT: v_xor_b32_e64 v15, v4, v5
+; GFX9-O0-NEXT: ; kill: def $vgpr15 killed $vgpr15 def $vgpr15_vgpr16 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v16, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v9, v15
+; GFX9-O0-NEXT: v_mov_b32_e32 v1, v16
+; GFX9-O0-NEXT: v_mov_b32_e32 v10, v13
+; GFX9-O0-NEXT: v_mov_b32_e32 v5, v14
+; GFX9-O0-NEXT: v_sub_co_u32_e32 v9, vcc, v9, v4
+; GFX9-O0-NEXT: v_subb_co_u32_e32 v1, vcc, v1, v6, vcc
+; GFX9-O0-NEXT: v_subb_co_u32_e32 v13, vcc, v10, v4, vcc
+; GFX9-O0-NEXT: v_subb_co_u32_e32 v5, vcc, v5, v6, vcc
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v14, v5
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v10, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v1, v3
+; GFX9-O0-NEXT: v_mov_b32_e32 v5, v12
+; GFX9-O0-NEXT: v_xor_b32_e64 v1, v5, v1
+; GFX9-O0-NEXT: ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v3, v11
+; GFX9-O0-NEXT: v_xor_b32_e64 v11, v3, v2
+; GFX9-O0-NEXT: ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v12, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v1, v8
+; GFX9-O0-NEXT: v_xor_b32_e64 v1, v5, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v2, v7
+; GFX9-O0-NEXT: v_xor_b32_e64 v7, v3, v2
+; GFX9-O0-NEXT: ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v8, v1
+; GFX9-O0-NEXT: v_mov_b32_e32 v1, v7
+; GFX9-O0-NEXT: v_mov_b32_e32 v7, v8
+; GFX9-O0-NEXT: v_mov_b32_e32 v8, v11
+; GFX9-O0-NEXT: v_mov_b32_e32 v2, v12
+; GFX9-O0-NEXT: v_sub_co_u32_e32 v1, vcc, v1, v3
+; GFX9-O0-NEXT: v_subb_co_u32_e32 v7, vcc, v7, v5, vcc
+; GFX9-O0-NEXT: v_subb_co_u32_e32 v11, vcc, v8, v3, vcc
+; GFX9-O0-NEXT: v_subb_co_u32_e32 v2, vcc, v2, v5, vcc
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v12, v2
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; implicit-def: $sgpr4
+; GFX9-O0-NEXT: ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v2, v7
+; GFX9-O0-NEXT: v_xor_b32_e64 v5, v5, v6
+; GFX9-O0-NEXT: v_xor_b32_e64 v3, v3, v4
+; GFX9-O0-NEXT: ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v4, v5
+; GFX9-O0-NEXT: v_mov_b32_e32 v6, v4
+; GFX9-O0-NEXT: v_mov_b32_e32 v5, v3
+; GFX9-O0-NEXT: buffer_store_dword v5, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: s_waitcnt vmcnt(0)
+; GFX9-O0-NEXT: buffer_store_dword v6, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v3, off, s[0:3], s32 offset:68 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: s_waitcnt vmcnt(0)
+; GFX9-O0-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:60 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: s_waitcnt vmcnt(0)
+; GFX9-O0-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:64 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v11, off, s[0:3], s32 offset:52 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: s_waitcnt vmcnt(0)
+; GFX9-O0-NEXT: buffer_store_dword v12, off, s[0:3], s32 offset:56 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v9, off, s[0:3], s32 offset:44 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: s_waitcnt vmcnt(0)
+; GFX9-O0-NEXT: buffer_store_dword v10, off, s[0:3], s32 offset:48 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: buffer_store_dword v13, off, s[0:3], s32 offset:36 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: s_waitcnt vmcnt(0)
+; GFX9-O0-NEXT: buffer_store_dword v14, off, s[0:3], s32 offset:40 ; 4-byte Folded Spill
+; GFX9-O0-NEXT: v_mov_b32_e32 v7, v12
+; GFX9-O0-NEXT: v_mov_b32_e32 v8, v2
+; GFX9-O0-NEXT: v_or_b32_e64 v3, v8, v7
+; GFX9-O0-NEXT: v_mov_b32_e32 v6, v11
+; GFX9-O0-NEXT: v_mov_b32_e32 v5, v1
+; GFX9-O0-NEXT: v_or_b32_e64 v1, v5, v6
+; GFX9-O0-NEXT: ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec
+; GFX9-O0-NEXT: v_mov_b32_e32 v2, v3
+; GFX9-O0-NEXT: s_mov_b64 s[6:7], 0
+; GFX9-O0-NEXT: v_writelane_b32 v0, s6, 0
+; GFX9-O0-NEXT: v_writelane_b32 v0, s7, 1
+; GFX9-O0-NEXT: v_cmp_eq_u64_e64 s[4:5], v[1:2], s[6:7]
+; GFX9-O0-NEXT: v_mov_b32_e32 v2, v14
+; GFX9-O0-NEXT: v_mov_b32_e32 v4, v10
+; GFX9-O0-NEXT: v_or_b32_e64 v15, v4, v2
+; GFX9-O0-NEXT: v_mov_b32_e32 v1, v13
+; GFX9-O0-NEXT: v_mov_b32_e32 v3, v9
+; GFX9-O0-NEXT: v_or_b32_e64 v9, v3, v1
+; GFX9-O0-NEXT: ; kill: def $vgpr9 killed $...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/80716
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