[llvm-branch-commits] [clang] 2e17e9e - [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

[Tobias Hieta via llvm-branch-commits]

Author: Craig Topper
Date: 2023-08-25T09:28:11+02:00
New Revision: 2e17e9e261dd511398a399226ce9e69f3dbc5d3f

URL: https://github.com/llvm/llvm-project/commit/2e17e9e261dd511398a399226ce9e69f3dbc5d3f
DIFF: https://github.com/llvm/llvm-project/commit/2e17e9e261dd511398a399226ce9e69f3dbc5d3f.diff

LOG: [RISCV] Check type size for lax conversions between RVV builtin types and VectorType::RVVFixedLengthDataVector.

This code was copied from SVE and modified for RVV. For SVE, there
is only one size for builtin types so they didn't need to check
the size. For RVV, due to LMUL there are 7 different sizes of builtin
types so we do need to check the size.

I'm not sure we should have lax vector conversions at all for RVV.
That appears to be contributing to https://github.com/llvm/llvm-project/issues/64404

This patch at least fixes the obvious correctness issue.
This should be backported to LLVM 17.

Reviewed By: jacquesguan

Differential Revision: https://reviews.llvm.org/D157130

(cherry picked from commit 33af2f131db71a18aefc5469129540e2097a537f)

Added: 
    

Modified: 
    clang/lib/AST/ASTContext.cpp
    clang/test/Sema/riscv-rvv-lax-vector-conversions.c

Removed: 
    


################################################################################
diff  --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 7acacd7bf4f504..76000156fece7c 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9612,9 +9612,8 @@ bool ASTContext::areLaxCompatibleRVVTypes(QualType FirstType,
       const LangOptions::LaxVectorConversionKind LVCKind =
           getLangOpts().getLaxVectorConversions();
 
-      // If __riscv_v_fixed_vlen != N do not allow GNU vector lax conversion.
-      if (VecTy->getVectorKind() == VectorType::GenericVector &&
-          getTypeSize(SecondType) != getRVVTypeSize(*this, BT))
+      // If __riscv_v_fixed_vlen != N do not allow vector lax conversion.
+      if (getTypeSize(SecondType) != getRVVTypeSize(*this, BT))
         return false;
 
       // If -flax-vector-conversions=all is specified, the types are

diff  --git a/clang/test/Sema/riscv-rvv-lax-vector-conversions.c b/clang/test/Sema/riscv-rvv-lax-vector-conversions.c
index ff3e028aa314dc..8ab01620b82aa0 100644
--- a/clang/test/Sema/riscv-rvv-lax-vector-conversions.c
+++ b/clang/test/Sema/riscv-rvv-lax-vector-conversions.c
@@ -2,8 +2,6 @@
 // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=8 -mvscale-max=8 -flax-vector-conversions=integer -ffreestanding -fsyntax-only -verify=lax-vector-integer %s
 // RUN: %clang_cc1 -triple riscv64-none-linux-gnu -target-feature +f -target-feature +d -target-feature +zve64d -mvscale-min=8 -mvscale-max=8 -flax-vector-conversions=all -ffreestanding -fsyntax-only -verify=lax-vector-all %s
 
-// lax-vector-all-no-diagnostics
-
 // REQUIRES: riscv-registered-target
 
 #define RVV_FIXED_ATTR __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)))
@@ -20,6 +18,8 @@ typedef __rvv_uint64m1_t vuint64m1_t;
 typedef __rvv_float32m1_t vfloat32m1_t;
 typedef __rvv_float64m1_t vfloat64m1_t;
 
+typedef __rvv_int64m2_t vint64m2_t;
+
 typedef vfloat32m1_t rvv_fixed_float32m1_t RVV_FIXED_ATTR;
 typedef vint32m1_t rvv_fixed_int32m1_t RVV_FIXED_ATTR;
 typedef float gnu_fixed_float32m1_t GNU_FIXED_ATTR;
@@ -76,3 +76,17 @@ void gnu_allowed_with_all_lax_conversions() {
   // lax-vector-none-error at -1 {{assigning to 'vfloat64m1_t' (aka '__rvv_float64m1_t') from incompatible type}}
   // lax-vector-integer-error at -2 {{assigning to 'vfloat64m1_t' (aka '__rvv_float64m1_t') from incompatible type}}
 }
+
+void not_allowed() {
+  rvv_fixed_int32m1_t fi32m1;
+  vint64m2_t si64m2;
+
+  fi32m1 = si64m2;
+  // lax-vector-none-error at -1 {{assigning to 'rvv_fixed_int32m1_t' (vector of 16 'int' values) from incompatible type}}
+  // lax-vector-integer-error at -2 {{assigning to 'rvv_fixed_int32m1_t' (vector of 16 'int' values) from incompatible type}}
+  // lax-vector-all-error at -3 {{assigning to 'rvv_fixed_int32m1_t' (vector of 16 'int' values) from incompatible type}}
+  si64m2 = fi32m1;
+  // lax-vector-none-error at -1 {{assigning to 'vint64m2_t' (aka '__rvv_int64m2_t') from incompatible type}}
+  // lax-vector-integer-error at -2 {{assigning to 'vint64m2_t' (aka '__rvv_int64m2_t') from incompatible type}}
+  // lax-vector-all-error at -3 {{assigning to 'vint64m2_t' (aka '__rvv_int64m2_t') from incompatible type}}
+}