[llvm-branch-commits] [llvm] 8918f69 - [RISCV] Support global address as inline asm memory operand of `m`
Tobias Hieta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Aug 21 22:51:41 PDT 2023
Author: wangpc
Date: 2023-08-22T07:49:21+02:00
New Revision: 8918f6911b7cf73e3fd51d29f73782c1e147088c
URL: https://github.com/llvm/llvm-project/commit/8918f6911b7cf73e3fd51d29f73782c1e147088c
DIFF: https://github.com/llvm/llvm-project/commit/8918f6911b7cf73e3fd51d29f73782c1e147088c.diff
LOG: [RISCV] Support global address as inline asm memory operand of `m`
In D146245, we have supported lowering inline asm `m` with offset
to `register+imm`, but we didn't handle the case that the offset
is the low part of global address.
This patch will emit `%lo(g)` when `g` is a global address.
Fixes #64656
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D157839
(cherry picked from commit dc60003ec8b2faf595b528a39f64b697a589da06)
Added:
Modified:
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
index f7d11e921c7ded..d2520d932ddfb6 100644
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -225,16 +225,23 @@ bool RISCVAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
const MachineOperand &AddrReg = MI->getOperand(OpNo);
assert(MI->getNumOperands() > OpNo + 1 && "Expected additional operand");
- const MachineOperand &DispImm = MI->getOperand(OpNo + 1);
+ const MachineOperand &Offset = MI->getOperand(OpNo + 1);
// All memory operands should have a register and an immediate operand (see
// RISCVDAGToDAGISel::SelectInlineAsmMemoryOperand).
if (!AddrReg.isReg())
return true;
- if (!DispImm.isImm())
+ if (!Offset.isImm() && !Offset.isGlobal())
return true;
- OS << DispImm.getImm() << "("
- << RISCVInstPrinter::getRegisterName(AddrReg.getReg()) << ")";
+ MCOperand MCO;
+ if (!lowerOperand(Offset, MCO))
+ return true;
+
+ if (Offset.isImm())
+ OS << MCO.getImm();
+ else if (Offset.isGlobal())
+ OS << *MCO.getExpr();
+ OS << "(" << RISCVInstPrinter::getRegisterName(AddrReg.getReg()) << ")";
return false;
}
diff --git a/llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll b/llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
index 3f770c1564d836..ae615286089293 100644
--- a/llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
+++ b/llvm/test/CodeGen/RISCV/inline-asm-mem-constraint.ll
@@ -8,6 +8,9 @@
; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs -no-integrated-as < %s \
; RUN: | FileCheck -check-prefixes=RV64I-MEDIUM %s
+ at eg = external global [4000 x i32], align 4
+ at ewg = extern_weak global [4000 x i32], align 4
+
define void @constraint_m_1(ptr %a) nounwind {
; RV32I-LABEL: constraint_m_1:
; RV32I: # %bb.0:
@@ -101,6 +104,260 @@ define i32 @constraint_m_with_offset(ptr %a) nounwind {
ret i32 %2
}
+define void @constraint_m_with_global_1() nounwind {
+; RV32I-LABEL: constraint_m_with_global_1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(eg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, %lo(eg)(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_m_with_global_1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(eg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, %lo(eg)(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_m_with_global_1:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi0)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_m_with_global_1:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi0:
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi0)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*m"(ptr elementtype(i32) @eg)
+ ret void
+}
+
+define void @constraint_m_with_global_2() nounwind {
+; RV32I-LABEL: constraint_m_with_global_2:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(eg)
+; RV32I-NEXT: addi a0, a0, %lo(eg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 4(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_m_with_global_2:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(eg)
+; RV64I-NEXT: addi a0, a0, %lo(eg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 4(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_m_with_global_2:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi1:
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_m_with_global_2:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi1:
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi1)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*m"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @eg, i32 0, i32 1))
+ ret void
+}
+
+define void @constraint_m_with_global_3() nounwind {
+; RV32I-LABEL: constraint_m_with_global_3:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(eg+8000)
+; RV32I-NEXT: addi a0, a0, %lo(eg+8000)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 0(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_m_with_global_3:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(eg+8000)
+; RV64I-NEXT: addi a0, a0, %lo(eg+8000)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 0(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_m_with_global_3:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi2:
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg+8000)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_m_with_global_3:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi2:
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg+8000)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi2)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*m"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @eg, i32 0, i32 2000))
+ ret void
+}
+
+define void @constraint_m_with_extern_weak_global_1() nounwind {
+; RV32I-LABEL: constraint_m_with_extern_weak_global_1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(ewg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, %lo(ewg)(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_m_with_extern_weak_global_1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(ewg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, %lo(ewg)(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_m_with_extern_weak_global_1:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi3:
+; RV32I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV32I-MEDIUM-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi3)(a0)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_m_with_extern_weak_global_1:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi3:
+; RV64I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV64I-MEDIUM-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi3)(a0)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*m"(ptr elementtype(i32) @ewg)
+ ret void
+}
+
+define void @constraint_m_with_extern_weak_global_2() nounwind {
+; RV32I-LABEL: constraint_m_with_extern_weak_global_2:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(ewg)
+; RV32I-NEXT: addi a0, a0, %lo(ewg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 4(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_m_with_extern_weak_global_2:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(ewg)
+; RV64I-NEXT: addi a0, a0, %lo(ewg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 4(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_m_with_extern_weak_global_2:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi4:
+; RV32I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV32I-MEDIUM-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi4)(a0)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_m_with_extern_weak_global_2:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi4:
+; RV64I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV64I-MEDIUM-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi4)(a0)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*m"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @ewg, i32 0, i32 1))
+ ret void
+}
+
+define void @constraint_m_with_extern_weak_global_3() nounwind {
+; RV32I-LABEL: constraint_m_with_extern_weak_global_3:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(ewg+8000)
+; RV32I-NEXT: addi a0, a0, %lo(ewg+8000)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 0(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_m_with_extern_weak_global_3:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(ewg+8000)
+; RV64I-NEXT: addi a0, a0, %lo(ewg+8000)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 0(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_m_with_extern_weak_global_3:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi5:
+; RV32I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV32I-MEDIUM-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi5)(a0)
+; RV32I-MEDIUM-NEXT: lui a1, 2
+; RV32I-MEDIUM-NEXT: addi a1, a1, -192
+; RV32I-MEDIUM-NEXT: add a0, a0, a1
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_m_with_extern_weak_global_3:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi5:
+; RV64I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV64I-MEDIUM-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi5)(a0)
+; RV64I-MEDIUM-NEXT: lui a1, 2
+; RV64I-MEDIUM-NEXT: addiw a1, a1, -192
+; RV64I-MEDIUM-NEXT: add a0, a0, a1
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*m"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @ewg, i32 0, i32 2000))
+ ret void
+}
+
define void @constraint_o_1(ptr %a) nounwind {
; RV32I-LABEL: constraint_o_1:
; RV32I: # %bb.0:
@@ -194,6 +451,260 @@ define i32 @constraint_o_with_offset(ptr %a) nounwind {
ret i32 %2
}
+define void @constraint_o_with_global_1() nounwind {
+; RV32I-LABEL: constraint_o_with_global_1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(eg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, %lo(eg)(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_o_with_global_1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(eg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, %lo(eg)(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_o_with_global_1:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi6:
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi6)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_o_with_global_1:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi6:
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi6)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*o"(ptr elementtype(i32) @eg)
+ ret void
+}
+
+define void @constraint_o_with_global_2() nounwind {
+; RV32I-LABEL: constraint_o_with_global_2:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(eg)
+; RV32I-NEXT: addi a0, a0, %lo(eg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 4(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_o_with_global_2:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(eg)
+; RV64I-NEXT: addi a0, a0, %lo(eg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 4(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_o_with_global_2:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi7:
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi7)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_o_with_global_2:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi7:
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi7)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*o"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @eg, i32 0, i32 1))
+ ret void
+}
+
+define void @constraint_o_with_global_3() nounwind {
+; RV32I-LABEL: constraint_o_with_global_3:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(eg+8000)
+; RV32I-NEXT: addi a0, a0, %lo(eg+8000)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 0(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_o_with_global_3:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(eg+8000)
+; RV64I-NEXT: addi a0, a0, %lo(eg+8000)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 0(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_o_with_global_3:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi8:
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg+8000)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi8)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_o_with_global_3:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi8:
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(eg+8000)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.Lpcrel_hi8)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*o"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @eg, i32 0, i32 2000))
+ ret void
+}
+
+define void @constraint_o_with_extern_weak_global_1() nounwind {
+; RV32I-LABEL: constraint_o_with_extern_weak_global_1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(ewg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, %lo(ewg)(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_o_with_extern_weak_global_1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(ewg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, %lo(ewg)(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_o_with_extern_weak_global_1:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi9:
+; RV32I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV32I-MEDIUM-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi9)(a0)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_o_with_extern_weak_global_1:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi9:
+; RV64I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV64I-MEDIUM-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi9)(a0)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*o"(ptr elementtype(i32) @ewg)
+ ret void
+}
+
+define void @constraint_o_with_extern_weak_global_2() nounwind {
+; RV32I-LABEL: constraint_o_with_extern_weak_global_2:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(ewg)
+; RV32I-NEXT: addi a0, a0, %lo(ewg)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 4(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_o_with_extern_weak_global_2:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(ewg)
+; RV64I-NEXT: addi a0, a0, %lo(ewg)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 4(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_o_with_extern_weak_global_2:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi10:
+; RV32I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV32I-MEDIUM-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi10)(a0)
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_o_with_extern_weak_global_2:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi10:
+; RV64I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV64I-MEDIUM-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi10)(a0)
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*o"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @ewg, i32 0, i32 1))
+ ret void
+}
+
+define void @constraint_o_with_extern_weak_global_3() nounwind {
+; RV32I-LABEL: constraint_o_with_extern_weak_global_3:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(ewg+8000)
+; RV32I-NEXT: addi a0, a0, %lo(ewg+8000)
+; RV32I-NEXT: #APP
+; RV32I-NEXT: sw zero, 0(a0)
+; RV32I-NEXT: #NO_APP
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: constraint_o_with_extern_weak_global_3:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(ewg+8000)
+; RV64I-NEXT: addi a0, a0, %lo(ewg+8000)
+; RV64I-NEXT: #APP
+; RV64I-NEXT: sw zero, 0(a0)
+; RV64I-NEXT: #NO_APP
+; RV64I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: constraint_o_with_extern_weak_global_3:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .Lpcrel_hi11:
+; RV32I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV32I-MEDIUM-NEXT: lw a0, %pcrel_lo(.Lpcrel_hi11)(a0)
+; RV32I-MEDIUM-NEXT: lui a1, 2
+; RV32I-MEDIUM-NEXT: addi a1, a1, -192
+; RV32I-MEDIUM-NEXT: add a0, a0, a1
+; RV32I-MEDIUM-NEXT: #APP
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: #NO_APP
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: constraint_o_with_extern_weak_global_3:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .Lpcrel_hi11:
+; RV64I-MEDIUM-NEXT: auipc a0, %got_pcrel_hi(ewg)
+; RV64I-MEDIUM-NEXT: ld a0, %pcrel_lo(.Lpcrel_hi11)(a0)
+; RV64I-MEDIUM-NEXT: lui a1, 2
+; RV64I-MEDIUM-NEXT: addiw a1, a1, -192
+; RV64I-MEDIUM-NEXT: add a0, a0, a1
+; RV64I-MEDIUM-NEXT: #APP
+; RV64I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV64I-MEDIUM-NEXT: #NO_APP
+; RV64I-MEDIUM-NEXT: ret
+ call void asm "sw zero, $0", "=*o"(ptr nonnull elementtype(i32) getelementptr inbounds ([400000 x i32], ptr @ewg, i32 0, i32 2000))
+ ret void
+}
+
define void @constraint_A(ptr %a) nounwind {
; RV32I-LABEL: constraint_A:
; RV32I: # %bb.0:
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