[llvm-branch-commits] [clang] e043c24 - Fixed STBCX

[Albion Fung via llvm-branch-commits]

Author: Albion Fung
Date: 2021-06-25T02:04:33-05:00
New Revision: e043c2429d773878e4ea8d4daf48ae561c499478

URL: https://github.com/llvm/llvm-project/commit/e043c2429d773878e4ea8d4daf48ae561c499478
DIFF: https://github.com/llvm/llvm-project/commit/e043c2429d773878e4ea8d4daf48ae561c499478.diff

LOG: Fixed STBCX

Added: 
    

Modified: 
    clang/lib/CodeGen/CGBuiltin.cpp
    llvm/include/llvm/IR/IntrinsicsPowerPC.td
    llvm/lib/IR/Instructions.cpp
    llvm/lib/Target/PowerPC/PPCInstrPrefix.td

Removed: 
    


################################################################################
diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 2cf28f546a55..ddd5605acaba 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15343,14 +15343,24 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
   }
 
   case PPC::BI__builtin_ppc_sthcx: {
-    dbgs() << "GENNING CUSTOM SEXT:" << E->getNumArgs() <<"\n";
-    // Value *Res =  Builder.CreateSExt(Ops[1], Int32Ty);
-    Ops[1] =  Builder.CreateSExt(Ops[1], Int32Ty);
     llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_sthcx);
-    // SmallVector<Value*, 2>  NewOps;
-    // NewOps.push_back(Ops[0]);
-    // NewOps.push_back(Res);
-    // return Builder.CreateCall(F, NewOps);
+    Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy);
+    Ops[1] = Builder.CreateSExt(Ops[1], Int32Ty);
+    return Builder.CreateCall(F, Ops);
+  }
+  case PPC::BI__builtin_ppc_stbcx: {
+    llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_stbcx);
+    Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy);
+    auto Signed = getIntegerWidthAndSignedness(CGM.getContext(),
+                 E->getArg(1)->getType()).Signed;
+
+    if (Signed) {
+      dbgs() << "SIGNED\n";
+      Ops[1] = Builder.CreateSExt(Ops[1], Int32Ty);
+    } else {
+      dbgs() << "UNSIGNED\n";
+      Ops[1] = Builder.CreateZExt(Ops[1], Int32Ty);
+    }
     return Builder.CreateCall(F, Ops);
   }
 

diff  --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index fc20f220894e..0383bc2a8a96 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1535,9 +1535,7 @@ let TargetPrefix = "ppc" in {
                       Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrWriteMem]>;
   def int_ppc_stwcx : GCCBuiltin<"__builtin_ppc_stwcx">,
                       Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
-  def int_ppc_sthcx : 
-                      Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
-  def int_ppc_stbcx : 
-                      Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
+  def int_ppc_sthcx : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
+  def int_ppc_stbcx : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrWriteMem]>;
 }
 

diff  --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp
index eb3bb8367759..f2316b609193 100644
--- a/llvm/lib/IR/Instructions.cpp
+++ b/llvm/lib/IR/Instructions.cpp
@@ -2936,8 +2936,6 @@ unsigned CastInst::isEliminableCastPair(
 
 CastInst *CastInst::Create(Instruction::CastOps op, Value *S, Type *Ty,
   const Twine &Name, Instruction *InsertBefore) {
-  dbgs() << "Op code bitcast: " << BitCast << "\n";
-  dbgs() << "DEBUG CREATE BEFORE: " << op << " NEXT " << *S << " TYPE " << *Ty << "\n";
   assert(castIsValid(op, S, Ty) && "Invalid cast!");
   // Construct and return the appropriate CastInst subclass
   switch (op) {

diff  --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
index 8d544f6c1040..d1514bbebe05 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -2851,7 +2851,7 @@ def : Pat<(int_ppc_lbarx xoaddr:$dst),
           (LBARX xoaddr:$dst)>;
 // def : Pat<(int_ppc_stwcx xoaddr:$dst, gprc:$A),
           // (STWCX gprc:$A, xoaddr:$dst)>;
-def : Pat<(int_ppc_sthcx xoaddr:$dst, (sextloadi32 gprc:$A)),
+def : Pat<(int_ppc_sthcx xoaddr:$dst, gprc:$A),
           (STHCX (EXTSH gprc:$A), xoaddr:$dst)>;
 def : Pat<(int_ppc_stbcx xoaddr:$dst, gprc:$A),
-          (STBCX (EXTSB gprc:$A), xoaddr:$dst)>;
+          (STBCX gprc:$A, xoaddr:$dst)>;