[llvm-branch-commits] [llvm] dda0a18 - [LLVM 11] Add SystemZ changes to release notes

Ulrich Weigand via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue Sep 29 06:00:29 PDT 2020


Author: Ulrich Weigand
Date: 2020-09-29T14:59:38+02:00
New Revision: dda0a1867cc0c4ace4535f179aec85c3ff8cfa96

URL: https://github.com/llvm/llvm-project/commit/dda0a1867cc0c4ace4535f179aec85c3ff8cfa96
DIFF: https://github.com/llvm/llvm-project/commit/dda0a1867cc0c4ace4535f179aec85c3ff8cfa96.diff

LOG: [LLVM 11] Add SystemZ changes to release notes

Differential Revision: https://reviews.llvm.org/D88479

Added: 
    

Modified: 
    llvm/docs/ReleaseNotes.rst

Removed: 
    


################################################################################
diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index d724ba09502a..db64fa281018 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -241,6 +241,21 @@ Bug fixes:
 * The correct libcall is now emitted for converting a float/double to a 32-bit
   signed or unsigned integer on RV64 targets lacking the F or D extensions.
 
+Changes to the SystemZ Target
+-----------------------------
+
+* Added support for the MemorySanitizer and the LeakSanitizer.
+* Added support for the ``-fstack-clash-protection`` command line option.
+* Enhanced the assembler parser to allow using `%r0` even in an address
+  register context, and to allow specifying registers using plain integer
+  numbers instead of register names everywhere.
+* Fixed wrong code generation violating the platform ABI when passing
+  a C++ class (not struct) type having only a single member of
+  floating-point type.
+* Fixed wrong code generation when using the `vec_store_len_r` or
+  `vec_load_len_r` intrinsics with an immediate length argument of
+  16 or larger.
+* Miscellaneous codegen enhancements, in particular to improve vector code.
 
 Changes to the X86 Target
 -------------------------


        


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