[llvm-branch-commits] [llvm] f598399 - ReleaseNotes: ARM and AArch64

Hans Wennborg via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Mon Feb 24 07:59:51 PST 2020


Author: Hans Wennborg
Date: 2020-02-24T16:59:21+01:00
New Revision: f59839930716dca910ba66b413d6bd2cc6a61a61

URL: https://github.com/llvm/llvm-project/commit/f59839930716dca910ba66b413d6bd2cc6a61a61
DIFF: https://github.com/llvm/llvm-project/commit/f59839930716dca910ba66b413d6bd2cc6a61a61.diff

LOG: ReleaseNotes: ARM and AArch64

By Kristof Beyls!

Added: 
    

Modified: 
    clang/docs/ReleaseNotes.rst
    llvm/docs/ReleaseNotes.rst

Removed: 
    


################################################################################
diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 53e5d8d357f7..784766bc9a34 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -183,7 +183,7 @@ New Pragmas in Clang
 Attribute Changes in Clang
 --------------------------
 
-- ...
+- Support was added for function ``__attribute__((target("branch-protection=...")))``
 
 Windows Support
 ---------------

diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 0904a5793e77..c992bebf47c9 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -123,10 +123,19 @@ Changes to building LLVM
 
 ...
 
+Changes to the AArch64 Backend
+------------------------------
+
+- Added support for Cortex-A65, Cortex-A65AE, Neoverse E1 and Neoverse N1 cores.
+- With a few more bugs fixed in the LLVM 10 release, clang-cl can now target windows-on-Arm well, demonstrated by building complex pieces of software such as Chromium and the Electron framework.
+- Support for -fpatchable-function-entry was added.
+
 Changes to the ARM Backend
 --------------------------
 
- During this release ...
+- Optimized Armv8.1-M code generation, including generating Low Overhead Loops.
+- Added auto-vectorization for the Armv8.1-M MVE vector extension.
+- Support was added for inline asm constraints s,j,x,N,O.
 
 
 Changes to the MIPS Target


        


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