[llvm-branch-commits] [llvm-branch] r374633 - Merging r372606:

[Tom Stellard via llvm-branch-commits]

Author: tstellar
Date: Fri Oct 11 19:47:19 2019
New Revision: 374633

URL: http://llvm.org/viewvc/llvm-project?rev=374633&view=rev
Log:
Merging r372606:

------------------------------------------------------------------------
r372606 | spatel | 2019-09-23 06:30:23 -0700 (Mon, 23 Sep 2019) | 3 lines

[x86] fix assert with horizontal math + broadcast of vector (PR43402)

https://bugs.llvm.org/show_bug.cgi?id=43402
------------------------------------------------------------------------

Added:
    llvm/branches/release_90/test/CodeGen/X86/haddsub-broadcast.ll
Modified:
    llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp
    llvm/branches/release_90/lib/Target/X86/X86ISelLowering.h

Modified: llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp?rev=374633&r1=374632&r2=374633&view=diff
==============================================================================
--- llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/release_90/lib/Target/X86/X86ISelLowering.cpp Fri Oct 11 19:47:19 2019
@@ -33651,14 +33651,14 @@ static SDValue foldShuffleOfHorizOp(SDNo
 
   // When the operands of a horizontal math op are identical, the low half of
   // the result is the same as the high half. If a target shuffle is also
-  // replicating low and high halves, we don't need the shuffle.
+  // replicating low and high halves (and without changing the type/length of
+  // the vector), we don't need the shuffle.
   if (Opcode == X86ISD::MOVDDUP || Opcode == X86ISD::VBROADCAST) {
-    if (HOp.getScalarValueSizeInBits() == 64) {
+    if (HOp.getScalarValueSizeInBits() == 64 && HOp.getValueType() == VT) {
       // movddup (hadd X, X) --> hadd X, X
       // broadcast (extract_vec_elt (hadd X, X), 0) --> hadd X, X
       assert((HOp.getValueType() == MVT::v2f64 ||
-        HOp.getValueType() == MVT::v4f64) && HOp.getValueType() == VT &&
-        "Unexpected type for h-op");
+              HOp.getValueType() == MVT::v4f64) && "Unexpected type for h-op");
       return updateHOp(HOp, DAG);
     }
     return SDValue();

Modified: llvm/branches/release_90/lib/Target/X86/X86ISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/lib/Target/X86/X86ISelLowering.h?rev=374633&r1=374632&r2=374633&view=diff
==============================================================================
--- llvm/branches/release_90/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/branches/release_90/lib/Target/X86/X86ISelLowering.h Fri Oct 11 19:47:19 2019
@@ -422,7 +422,8 @@ namespace llvm {
       // Tests Types Of a FP Values for scalar types.
       VFPCLASSS,
 
-      // Broadcast scalar to vector.
+      // Broadcast (splat) scalar or element 0 of a vector. If the operand is
+      // a vector, this node may change the vector length as part of the splat.
       VBROADCAST,
       // Broadcast mask to vector.
       VBROADCASTM,

Added: llvm/branches/release_90/test/CodeGen/X86/haddsub-broadcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/test/CodeGen/X86/haddsub-broadcast.ll?rev=374633&view=auto
==============================================================================
--- llvm/branches/release_90/test/CodeGen/X86/haddsub-broadcast.ll (added)
+++ llvm/branches/release_90/test/CodeGen/X86/haddsub-broadcast.ll Fri Oct 11 19:47:19 2019
@@ -0,0 +1,20 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-- -mattr=avx2  | FileCheck %s
+
+; The broadcast node takes a vector operand as input and changes its length.
+
+define <4 x double> @PR43402(i64 %x) {
+; CHECK-LABEL: PR43402:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
+; CHECK-NEXT:    vunpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
+; CHECK-NEXT:    vsubpd {{\.LCPI.*}}, %xmm0, %xmm0
+; CHECK-NEXT:    vhaddpd %xmm0, %xmm0, %xmm0
+; CHECK-NEXT:    vbroadcastsd %xmm0, %ymm0
+; CHECK-NEXT:    retl
+  %conv = uitofp i64 %x to double
+  %t2 = insertelement <4 x double> undef, double %conv, i32 0
+  %t3 = shufflevector <4 x double> %t2, <4 x double> undef, <4 x i32> zeroinitializer
+  ret <4 x double> %t3
+}
+