[llvm-branch-commits] [llvm-branch] r235859 - Merging r227084:
Daniel Sanders
daniel.sanders at imgtec.com
Mon Apr 27 03:29:59 PDT 2015
Author: dsanders
Date: Mon Apr 27 05:29:59 2015
New Revision: 235859
URL: http://llvm.org/viewvc/llvm-project?rev=235859&view=rev
Log:
Merging r227084:
------------------------------------------------------------------------
r227084 | vmedic | 2015-01-26 10:33:43 +0000 (Mon, 26 Jan 2015) | 1 line
When disassembler meets compact jump instructions for r6 it crashes as the access to operands array is out of range. This patch removes dedicated decoder method that wrongly handles decoding of these instructions.
------------------------------------------------------------------------
Modified:
llvm/branches/release_36/ (props changed)
llvm/branches/release_36/lib/Target/Mips/Mips32r6InstrInfo.td
llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-xfail-mips32r6.txt
llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt
Propchange: llvm/branches/release_36/
------------------------------------------------------------------------------
--- svn:mergeinfo (original)
+++ svn:mergeinfo Mon Apr 27 05:29:59 2015
@@ -1,3 +1,3 @@
/llvm/branches/Apple/Pertwee:110850,110961
/llvm/branches/type-system-rewrite:133420-134817
-/llvm/trunk:155241,226023,226029,226044,226046,226048,226058,226075,226151,226164-226166,226170-226171,226182,226407-226409,226473,226588,226616,226652,226664,226708,226711,226755,226791,226808-226809,226905,227005,227085,227087,227089,227250,227260-227261,227269,227290,227294,227299,227319,227339,227491,227584,227603,227628,227670,227809,227815,227903,227934,227972,227983,228049,228129,228168,228331,228411,228444,228490,228500,228507,228518,228525,228565,228656,228760-228761,228793,228842,228899,228957,228969,228979,229029,229343,229351-229352,229421,229495,229529,229731,229911,230058,231219,231227,231563,231601,232046,232085,232189
+/llvm/trunk:155241,226023,226029,226044,226046,226048,226058,226075,226151,226164-226166,226170-226171,226182,226407-226409,226473,226588,226616,226652,226664,226708,226711,226755,226791,226808-226809,226905,227005,227084-227085,227087,227089,227250,227260-227261,227269,227290,227294,227299,227319,227339,227491,227584,227603,227628,227670,227809,227815,227903,227934,227972,227983,228049,228129,228168,228331,228411,228444,228490,228500,228507,228518,228525,228565,228656,228760-228761,228793,228842,228899,228957,228969,228979,229029,229343,229351-229352,229421,229495,229529,229731,229911,230058,231219,231227,231563,231601,232046,232085,232189
Modified: llvm/branches/release_36/lib/Target/Mips/Mips32r6InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/lib/Target/Mips/Mips32r6InstrInfo.td?rev=235859&r1=235858&r2=235859&view=diff
==============================================================================
--- llvm/branches/release_36/lib/Target/Mips/Mips32r6InstrInfo.td (original)
+++ llvm/branches/release_36/lib/Target/Mips/Mips32r6InstrInfo.td Mon Apr 27 05:29:59 2015
@@ -379,7 +379,6 @@ class JMP_IDX_COMPACT_DESC_BASE<string o
list<dag> Pattern = [];
bit isTerminator = 1;
bit hasDelaySlot = 0;
- string DecoderMethod = "DecodeSimm16";
}
class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
Modified: llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt?rev=235859&r1=235858&r2=235859&view=diff
==============================================================================
--- llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt (original)
+++ llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt Mon Apr 27 05:29:59 2015
@@ -142,3 +142,5 @@
0xb7 0x34 0x52 0x49 # CHECK: lwc2 $18, -841($6)
0x75 0x92 0xf4 0x49 # CHECK: sdc2 $20, 629($18)
0x30 0x81 0x79 0x49 # CHECK: swc2 $25, 304($16)
+0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
+0x00 0x01 0x05 0xd8 # CHECK: jic $5, 256
Modified: llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt?rev=235859&r1=235858&r2=235859&view=diff
==============================================================================
--- llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt (original)
+++ llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt Mon Apr 27 05:29:59 2015
@@ -142,3 +142,6 @@
0x49 0x52 0x34 0xb7 # CHECK: lwc2 $18, -841($6)
0x49 0xf4 0x92 0x75 # CHECK: sdc2 $20, 629($18)
0x49 0x79 0x81 0x30 # CHECK: swc2 $25, 304($16)
+0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
+0xd8 0x05 0x01 0x00 # CHECK: jic $5, 256
+
Modified: llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-xfail-mips32r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-xfail-mips32r6.txt?rev=235859&r1=235858&r2=235859&view=diff
==============================================================================
--- llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-xfail-mips32r6.txt (original)
+++ llvm/branches/release_36/test/MC/Disassembler/Mips/mips32r6/valid-xfail-mips32r6.txt Mon Apr 27 05:29:59 2015
@@ -14,6 +14,4 @@
0x60 0xa0 0x00 0x40 # CHECK: bnec $5, $zero, 256
0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256
0x7c 0xa1 0x04 0x25 # CHECK: cache 1, 8($5)
-0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
-0xd8 0x05 0x01 0x00 # CHECK: jic $5, 256
0x7c 0xa1 0x04 0x35 # CHECK: pref 1, 8($5)
Modified: llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt?rev=235859&r1=235858&r2=235859&view=diff
==============================================================================
--- llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt (original)
+++ llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt Mon Apr 27 05:29:59 2015
@@ -160,3 +160,6 @@
0xb7 0x34 0x52 0x49 # CHECK: lwc2 $18, -841($6)
0x75 0x92 0xf4 0x49 # CHECK: sdc2 $20, 629($18)
0x30 0x81 0x79 0x49 # CHECK: swc2 $25, 304($16)
+0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
+0x00 0x01 0x05 0xd8 # CHECK: jic $5, 256
+
Modified: llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt?rev=235859&r1=235858&r2=235859&view=diff
==============================================================================
--- llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt (original)
+++ llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt Mon Apr 27 05:29:59 2015
@@ -160,3 +160,6 @@
0x49 0x52 0x34 0xb7 # CHECK: lwc2 $18, -841($6)
0x49 0xf4 0x92 0x75 # CHECK: sdc2 $20, 629($18)
0x49 0x79 0x81 0x30 # CHECK: swc2 $25, 304($16)
+0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
+0xd8 0x05 0x01 0x00 # CHECK: jic $5, 256
+
Modified: llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt?rev=235859&r1=235858&r2=235859&view=diff
==============================================================================
--- llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt (original)
+++ llvm/branches/release_36/test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt Mon Apr 27 05:29:59 2015
@@ -14,8 +14,6 @@
0x60 0xa0 0x00 0x40 # CHECK: bnec $5, $zero, 256
0x60 0xa6 0x00 0x40 # CHECK: bnec $5, $6, 256
0x7c 0xa1 0x04 0x25 # CHECK: cache 1, 8($5)
-0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
-0xd8 0x05 0x01 0x00 # CHECK: jic $5, 256
0x7c 0xa1 0x04 0x35 # CHECK: pref 1, 8($5)
0x64 0x58 0x46 0x9f # CHECK: daddiu $24, $2, 18079
0x66 0x73 0x69 0x3f # CHECK: daddiu $19, $19, 26943
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