[llvm-branch-commits] [llvm-branch] r165969 - in /llvm/branches/R600: lib/Target/AMDGPU/AMDGPUISelLowering.cpp lib/Target/AMDGPU/AMDILIntrinsics.td test/CodeGen/R600/fabs.ll test/CodeGen/R600/llvm.AMDIL.fabs..ll

[Tom Stellard]

Author: tstellar
Date: Mon Oct 15 15:53:43 2012
New Revision: 165969

URL: http://llvm.org/viewvc/llvm-project?rev=165969&view=rev
Log:
R600: use llvm fabs intrinsic

Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

Added:
    llvm/branches/R600/test/CodeGen/R600/fabs.ll
      - copied, changed from r165968, llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll
Removed:
    llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll
Modified:
    llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td

Modified: llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp?rev=165969&r1=165968&r2=165969&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp Mon Oct 15 15:53:43 2012
@@ -36,6 +36,7 @@
   setOperationAction(ISD::FEXP2,  MVT::f32, Legal);
   setOperationAction(ISD::FPOW,   MVT::f32, Legal);
   setOperationAction(ISD::FLOG2,  MVT::f32, Legal);
+  setOperationAction(ISD::FABS,   MVT::f32, Legal);
   setOperationAction(ISD::FRINT,  MVT::f32, Legal);
 
   setOperationAction(ISD::UDIV, MVT::i32, Expand);
@@ -110,8 +111,6 @@
       return LowerIntrinsicIABS(Op, DAG);
     case AMDGPUIntrinsic::AMDIL_exp:
       return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
-    case AMDGPUIntrinsic::AMDIL_fabs:
-      return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
     case AMDGPUIntrinsic::AMDGPU_lrp:
       return LowerIntrinsicLRP(Op, DAG);
     case AMDGPUIntrinsic::AMDIL_fraction:

Modified: llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td?rev=165969&r1=165968&r2=165969&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td Mon Oct 15 15:53:43 2012
@@ -66,7 +66,6 @@
 }
 
 let TargetPrefix = "AMDIL", isTarget = 1 in {
-  def int_AMDIL_fabs : GCCBuiltin<"__amdil_fabs">, UnaryIntFloat;
   def int_AMDIL_abs : GCCBuiltin<"__amdil_abs">, UnaryIntInt;
 
   def int_AMDIL_bit_extract_i32 : GCCBuiltin<"__amdil_ibit_extract">,

Copied: llvm/branches/R600/test/CodeGen/R600/fabs.ll (from r165968, llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/fabs.ll?p2=llvm/branches/R600/test/CodeGen/R600/fabs.ll&p1=llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll&r1=165968&r2=165969&rev=165969&view=diff
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll (original)
+++ llvm/branches/R600/test/CodeGen/R600/fabs.ll Mon Oct 15 15:53:43 2012
@@ -4,7 +4,7 @@
 
 define void @test() {
    %r0 = call float @llvm.R600.load.input(i32 0)
-   %r1 = call float @llvm.AMDIL.fabs.( float %r0)
+   %r1 = call float @fabs( float %r0)
    call void @llvm.AMDGPU.store.output(float %r1, i32 0)
    ret void
 }
@@ -13,4 +13,4 @@
 
 declare void @llvm.AMDGPU.store.output(float, i32)
 
-declare float @llvm.AMDIL.fabs.(float ) readnone
+declare float @fabs(float ) readnone

Removed: llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll?rev=165968&view=auto
==============================================================================
--- llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll (original)
+++ llvm/branches/R600/test/CodeGen/R600/llvm.AMDIL.fabs..ll (removed)
@@ -1,16 +0,0 @@
-;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
-
-;CHECK: MOV T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
-
-define void @test() {
-   %r0 = call float @llvm.R600.load.input(i32 0)
-   %r1 = call float @llvm.AMDIL.fabs.( float %r0)
-   call void @llvm.AMDGPU.store.output(float %r1, i32 0)
-   ret void
-}
-
-declare float @llvm.R600.load.input(i32) readnone
-
-declare void @llvm.AMDGPU.store.output(float, i32)
-
-declare float @llvm.AMDIL.fabs.(float ) readnone