[llvm-branch-commits] [llvm-branch] r165968 - in /llvm/branches/R600/lib/Target/AMDGPU: AMDGPUISelLowering.cpp AMDILIntrinsics.td R600Instructions.td

[Tom Stellard]

Author: tstellar
Date: Mon Oct 15 15:53:42 2012
New Revision: 165968

URL: http://llvm.org/viewvc/llvm-project?rev=165968&view=rev
Log:
R600: use llvm intrinsic for flog2

Patch by: Vincent Lejeune

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>

Modified:
    llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td
    llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td

Modified: llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp?rev=165968&r1=165967&r2=165968&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/AMDGPUISelLowering.cpp Mon Oct 15 15:53:42 2012
@@ -35,6 +35,7 @@
   setOperationAction(ISD::FCEIL,  MVT::f32, Legal);
   setOperationAction(ISD::FEXP2,  MVT::f32, Legal);
   setOperationAction(ISD::FPOW,   MVT::f32, Legal);
+  setOperationAction(ISD::FLOG2,  MVT::f32, Legal);
   setOperationAction(ISD::FRINT,  MVT::f32, Legal);
 
   setOperationAction(ISD::UDIV, MVT::i32, Expand);

Modified: llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td?rev=165968&r1=165967&r2=165968&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/AMDILIntrinsics.td Mon Oct 15 15:53:42 2012
@@ -180,8 +180,6 @@
           UnaryIntFloat;
   def int_AMDIL_exn : GCCBuiltin<"__amdil_exn">,
           UnaryIntFloat;
-  def int_AMDIL_log : GCCBuiltin<"__amdil_log">,
-          UnaryIntFloat;
   def int_AMDIL_log_vec : GCCBuiltin<"__amdil_log_vec">,
           UnaryIntFloat;
   def int_AMDIL_ln : GCCBuiltin<"__amdil_ln">,

Modified: llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td?rev=165968&r1=165967&r2=165968&view=diff
==============================================================================
--- llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td (original)
+++ llvm/branches/R600/lib/Target/AMDGPU/R600Instructions.td Mon Oct 15 15:53:42 2012
@@ -771,7 +771,7 @@
 
 class LOG_IEEE_Common <bits<11> inst> : R600_1OP <
   inst, "LOG_IEEE",
-  [(set R600_Reg32:$dst, (int_AMDIL_log R600_Reg32:$src))]
+  [(set R600_Reg32:$dst, (flog2 R600_Reg32:$src))]
 >;
 
 class LSHL_Common <bits<11> inst> : R600_2OP <