[clang] [llvm] [CLANG][LLVM][AArch64]SME2.1 intrinsics for MOVAZ tile to 2/4 vectors (PR #88710)

[Momchil Velikov via cfe-commits]

================
@@ -2883,19 +2883,28 @@ MachineBasicBlock *AArch64TargetLowering::EmitZTInstr(MachineInstr &MI,
 
 MachineBasicBlock *
 AArch64TargetLowering::EmitZAInstr(unsigned Opc, unsigned BaseReg,
-                                   MachineInstr &MI,
-                                   MachineBasicBlock *BB, bool HasTile) const {
+                                   MachineInstr &MI, MachineBasicBlock *BB,
+                                   bool HasTile, bool HasZPROut) const {
   const TargetInstrInfo *TII = Subtarget->getInstrInfo();
   MachineInstrBuilder MIB = BuildMI(*BB, MI, MI.getDebugLoc(), TII->get(Opc));
   unsigned StartIdx = 0;
 
-  if (HasTile) {
-    MIB.addReg(BaseReg + MI.getOperand(0).getImm(), RegState::Define);
-    MIB.addReg(BaseReg + MI.getOperand(0).getImm());
-    StartIdx = 1;
-  } else
-    MIB.addReg(BaseReg, RegState::Define).addReg(BaseReg);
-
+  if (HasZPROut) {
----------------
momchil-velikov wrote:

I think it can be made a bit more clear and less verbose if we separate the conditions and use `StartIdx` to track how many of the input operands we have consumes, something like:
```
unsigned StartIdx = 0;
if (HasGPROut) {
  MIB.add(MI.getOperand(0)); // Output ZPR
  ++StartIdx;
}
if (HasTile) {
  MIB.addReg(BaseReg + MI.getOperand(StartIdx).getImm(), RegState::Define); // Output ZA Tile
  MIB.addReg(BaseReg + MI.getOperand(StartIdx).getImm()); // Input Za Tile
  ++StartIdx;
} else {
  MIB.addReg(BaseReg, RegState::Define).addReg(BaseReg);
}
```

https://github.com/llvm/llvm-project/pull/88710