[clang] [llvm] [clang][SPIR-V] Add support for AMDGCN flavoured SPIRV (PR #89796)

[Alex Voicu via cfe-commits]

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+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple spirv64-amd-amdhsa -fsyntax-only -verify %s
+
+#pragma OPENCL EXTENSION cl_khr_fp64 : enable
+
+kernel void test () {
+
+  int sgpr = 0, vgpr = 0, imm = 0;
+
+  // sgpr constraints
+  __asm__ ("s_mov_b32 %0, %1" : "=s" (sgpr) : "s" (imm) : );
+
+  __asm__ ("s_mov_b32 %0, %1" : "={s1}" (sgpr) : "{exec}" (imm) : );
+  __asm__ ("s_mov_b32 %0, %1" : "={s1}" (sgpr) : "{exe" (imm) : ); // expected-error {{invalid input constraint '{exe' in asm}}
+  __asm__ ("s_mov_b32 %0, %1" : "={s1}" (sgpr) : "{exec" (imm) : ); // expected-error {{invalid input constraint '{exec' in asm}}
+  __asm__ ("s_mov_b32 %0, %1" : "={s1}" (sgpr) : "{exec}a" (imm) : ); // expected-error {{invalid input constraint '{exec}a' in asm}}
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AlexVlx wrote:

I think that, whilst appealing, it'd be problematic in a few ways, but mainly it'd relegate this to interesting tech experiment that is not particularly useful to existing users. There's already oodles of AMDGCN ASM that has been authored (a lot of it unguarded to boot); most of it is actually arithmetic, that tickles numbered registers to achieve peak performance. Telling folks that they need to rewrite swathes of their libs / core algorithms in order to get SPIRV is highly likely to ensure they aggressively ignore it. To my mind this is a necessary evil.

https://github.com/llvm/llvm-project/pull/89796