[clang] [llvm] [arm] Support reserving r4 and r5 alongside r9 (PR #89849)

[via cfe-commits]

benisxdxd wrote:

@smithp35 
I have looked more into the `__chkstk` and stuff which is implemented in `ARMISelLowering.cpp`. 
Also in `Thumb1FrameLowering.cpp` R4 is used as a temporary in 
```
    // mov  r4, sp
    // lsrs r4, r4, #NrBitsToZero
    // lsls r4, r4, #NrBitsToZero
    // mov  sp, r4
   ```
But I don't think it will cause an issue because it is basically and intrinsic and is restored right afterwards.
In the system I work with `__chkstk` is not an issue (according to doc `__chkstk` is only used on windows and on thumb 2 mode).
In `adjustForSegmentedStacks` r4 and r5 are used hardcoded but we perhaps could change it to r5 and r6.
But yeah now I see what you meant.
I need to think about this more. 

https://github.com/llvm/llvm-project/pull/89849