[PATCH] D145538: [NFC][AArch64] Document and improve FMV code.

Tomas Matheson via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Mar 8 05:32:33 PST 2023


tmatheson accepted this revision.
tmatheson added a comment.
This revision is now accepted and ready to land.

LGTM, thanks for making these changes.



================
Comment at: llvm/include/llvm/TargetParser/AArch64TargetParser.h:567-568
+
+// For given features returns a mask to check if CPU support them. The mask is
+// used in Function Multi Versioning resolver conditions code generation.
 uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs);
----------------
`CPUFeatures` has 60 entries, which means the return value here will overflow if we add a few more entries. We should probably have a `static_assert(FEAT_MAX <= 64)` in the implementation. Or should the `CPUFeatures` values actually be bitmasks, like ArchExtKind?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145538/new/

https://reviews.llvm.org/D145538



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