[PATCH] D145088: [RISCV][WIP] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.

[Craig Topper via Phabricator via cfe-commits]

craig.topper created this revision.
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This allows the user to set the size of the scalable vector so they
can be used in structs and as the type of global variables. This works
by representing the type as a fixed vector instead of a scalable vector
in IR. Conversions to and from scalable vectors are made where necessary
like function arguments/returns and intrinsics.

This features has been requested here
https://github.com/riscv-non-isa/rvv-intrinsic-doc/issues/176
I know arm_sve_vector_bits is used by the Eigen library so this
could be used to port Eigen to RVV.

Any binary that uses this feature is not forward portable to hardware
with a larger vector size. That's true for SVE as well.

This patch adds a new preprocessor define __RISCV_RVV_VLEN_BITS that
is set when -mrvv_vector_bits is passed on the command line.

The code is largely based on the AArch64 code. A lot of code was
copy/pasted and then modiied to RVV. There may be some opportunities
for sharing.

This first patch only supports the LMUL=1 types. Additional changes
will be needed to support other LMULs. I have also not supported
mask vectors.

I still have a few more test files to add, but the code seems to be
working so far.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D145088

Files:
  clang/docs/ReleaseNotes.rst
  clang/include/clang/AST/ASTContext.h
  clang/include/clang/AST/Type.h
  clang/include/clang/Basic/Attr.td
  clang/include/clang/Basic/AttrDocs.td
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/include/clang/Basic/RISCVVTypes.def
  clang/include/clang/Sema/Overload.h
  clang/include/clang/Sema/Sema.h
  clang/lib/AST/ASTContext.cpp
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/AST/JSONNodeDumper.cpp
  clang/lib/AST/TextNodeDumper.cpp
  clang/lib/AST/Type.cpp
  clang/lib/AST/TypePrinter.cpp
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Sema/SemaCast.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/lib/Sema/SemaExpr.cpp
  clang/lib/Sema/SemaExprCXX.cpp
  clang/lib/Sema/SemaOverload.cpp
  clang/lib/Sema/SemaType.cpp
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-call.c
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-cast.c
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c
  clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
  clang/test/CodeGen/riscv-rvv-vls-arith-ops.c
  clang/test/Driver/riscv-rvv-vector-bits.c
  clang/test/Sema/attr-riscv-rvv-vector-bits.c
  clang/test/Sema/riscv-rvv-explicit-casts-fixed-size.c
  clang/test/Sema/riscv-rvv-lax-vector-conversions.c
  clang/test/Sema/riscv-vector-types-support.c
  clang/test/SemaCXX/attr-riscv-rvv-vector-bits.cpp
  clang/test/SemaCXX/riscv-rvv-explicit-casts-fixed-size.cpp
  clang/test/SemaCXX/riscv-rvv-lax-vector-conversions.cpp

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