[PATCH] D130131: [HLSL] CodeGen hlsl cbuffer/tbuffer.

[Xiang Li via Phabricator via cfe-commits]

python3kgae added a comment.

In D130131#3720552 <https://reviews.llvm.org/D130131#3720552>, @beanz wrote:

> Now that I'm seeing the code in D131370 <https://reviews.llvm.org/D131370>, I don't know that this is the right way to do things.
>
> I think using address spaces like this is odd. Address spaces aren't really intended for use differentiating high level access types, but rather memory regions and properties of that memory. I feel like the use of address spaces in this change and in D131370 <https://reviews.llvm.org/D131370> just makes it more complicated and gets in the way.
>
> In DXIL, since we don't really have raw memory load and stores, none of these address spaces mean anything. It is probably just cleaner to not use address spaces in the CodeGen here either.

If not use address space, how do llvm passes know a cbuffer ptr is different from a tbuffer ptr or ptr to a static global variable? Or llvm passes don't need to know the difference?



================
Comment at: clang/lib/CodeGen/CGHLSLRuntime.cpp:96
+  }
+  Buf.LayoutStruct = llvm::StructType::get(EltTys[0]->getContext(), EltTys);
+}
----------------
beanz wrote:
> Why are you manually inserting padding?
> 
> IR level accesses don't require explicit layout, and we don't do this in DXC either.
Does DL take care of the alignment


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https://reviews.llvm.org/D130131