[clang] 14c5fd9 - [Clang][RISCV] Change TARGET_BUILTIN to require zve32x for vector instruction

[via cfe-commits]

Author: eopXD
Date: 2022-01-20T06:53:48-08:00
New Revision: 14c5fd920b0e4e05c5deed358af47707e579dd6d

URL: https://github.com/llvm/llvm-project/commit/14c5fd920b0e4e05c5deed358af47707e579dd6d
DIFF: https://github.com/llvm/llvm-project/commit/14c5fd920b0e4e05c5deed358af47707e579dd6d.diff

LOG: [Clang][RISCV] Change TARGET_BUILTIN to require zve32x for vector instruction

According to v-spec v1.0, `zve-32x` is the new minimum extension to include
to have vector instructions.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D112613

Added: 
    

Modified: 
    clang/utils/TableGen/RISCVVEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/clang/utils/TableGen/RISCVVEmitter.cpp b/clang/utils/TableGen/RISCVVEmitter.cpp
index 08724fb35397..d3f1d63185f4 100644
--- a/clang/utils/TableGen/RISCVVEmitter.cpp
+++ b/clang/utils/TableGen/RISCVVEmitter.cpp
@@ -1027,7 +1027,7 @@ void RVVEmitter::createBuiltins(raw_ostream &OS) {
 
   OS << "#if defined(TARGET_BUILTIN) && !defined(RISCVV_BUILTIN)\n";
   OS << "#define RISCVV_BUILTIN(ID, TYPE, ATTRS) TARGET_BUILTIN(ID, TYPE, "
-        "ATTRS, \"experimental-v\")\n";
+        "ATTRS, \"experimental-zve32x\")\n";
   OS << "#endif\n";
   for (auto &Def : Defs) {
     auto P =