[PATCH] D111790: [AArch64][Driver][SVE] Allow -msve-vector-bits=<n>+ syntax to mean no maximum vscale

[Paul Walker via Phabricator via cfe-commits]

paulwalker-arm added a comment.

Are the references to "128-bit chunks" for the vscale flags necessary?  That's really a nuisance of SVE that LLVM IR should not need to worry about.  Can we speak exclusively in terms of vscale or is the "multiples of 128" required somewhere?  Perhaps we're missing a target specific convert function from vscale+elt to byes or something.  Also there's nothing stoping vscale from being 3 (essentially any positive number) but you look to be restricting it to a power of two.


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  https://reviews.llvm.org/D111790/new/

https://reviews.llvm.org/D111790