[PATCH] D100391: [RISCV][Clang] Add RVV miscellaneous intrinsic functions.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


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Comment at: clang/include/clang/Basic/riscv_vector.td:97
+//      type (SEW and LMUL), and computes another vector type which only changed
+//      SEW as given value. Ingore to define a new builtin if its qeuivalent
+//      type has illegal lmul or the SEW does not changed.
----------------
Ingore -> Ignore


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Comment at: clang/include/clang/Basic/riscv_vector.td:97
+//      type (SEW and LMUL), and computes another vector type which only changed
+//      SEW as given value. Ingore to define a new builtin if its qeuivalent
+//      type has illegal lmul or the SEW does not changed.
----------------
craig.topper wrote:
> Ingore -> Ignore
qeuivalent -> equivalent


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Comment at: clang/include/clang/Basic/riscv_vector.td:101
+//      and LMUL), and computes another vector type which only changed LMUL as
+//      given value. The new LMUL should be smaller than the old one. Ingore to
+//      define a new builtin if its qeuivalent type has illegal lmul.
----------------
Same


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Comment at: clang/include/clang/Basic/riscv_vector.td:102
+//      given value. The new LMUL should be smaller than the old one. Ingore to
+//      define a new builtin if its qeuivalent type has illegal lmul.
+//   (LFixedLog2LMUL:Value): Larger Fixed Log2LMUL. Given a vector type (SEW
----------------
Same


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Comment at: clang/include/clang/Basic/riscv_vector.td:105
+//      and LMUL), and computes another vector type which only changed LMUL as
+//      given value. The new LMUL should be larger than the old one. Ingore to
+//      define a new builtin if its qeuivalent type has illegal lmul.
----------------
Same


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Comment at: clang/include/clang/Basic/riscv_vector.td:106
+//      given value. The new LMUL should be larger than the old one. Ingore to
+//      define a new builtin if its qeuivalent type has illegal lmul.
 //
----------------
Same


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Comment at: clang/include/clang/Basic/riscv_vector.td:1304
+    // Reinterpret between different SEW under the same LMUL
+    foreach dst_sew = ["(FixedLog2SEW:3)", "(FixedLog2SEW:4)", "(FixedLog2SEW:5)",
+                       "(FixedLog2SEW:6)"] in {
----------------
Would this make more sense as just FixedSEW:8, FixedSEW:16, etc. I don't think the Log2 is helping here. We need it for LMUL because of the fractional lmul, but not SEW.


Repository:
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  https://reviews.llvm.org/D100391/new/

https://reviews.llvm.org/D100391