[PATCH] D14982: ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply Add/Subtract.

pengbin via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Wed Feb 24 23:57:56 PST 2021


pengbins added inline comments.
Herald added a subscriber: kristof.beyls.


================
Comment at: cfe/trunk/include/clang/Basic/arm_neon.td:377
+def OP_QRDMLAH : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, $p2))>;
+def OP_QRDMLSH : Op<(call "vqsub", $p0, (call "vqrdmulh", $p1, $p2))>;
+def OP_QRDMLAH_LN : Op<(call "vqadd", $p0, (call "vqrdmulh", $p1, (splat $p2, $p3)))>;
----------------
@labrinea 
It seems QRDMLSH(p0, p1, p2) is not equivelent to with  vqsub( p0, vqrdmulh(p1, p2)).

  - QRDMLSH(p0, p1, p2)

```
accum = ((p0 << esize) - 2 * (p1 * p2) + rounding_const);
ret = SignedSatQ(accum >> esize, esize);
```
//p0<< esize + rounding_const //

  - vqsub( p0, vqrdmulh(p1, p2))

```
temp = SignedSatQ( (2 * (p1 * p2) + rounding_const) >> esize );
ret = SignedSat( p0  -  temp);
```
//p0<< esize - rounding_const //


Here is an example where the results are not same.
vqrdmlshq_s16 ( -197,   -512, 11040)   = -24
vqsubq_s16( -197, vqrdmulhq_n_s16(-512, 11040)) = -25


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D14982/new/

https://reviews.llvm.org/D14982



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