[PATCH] D87358: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits

[Cullen Rhodes via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG002f5ab3b171: [clang][aarch64] Fix ILP32 ABI for arm_sve_vector_bits (authored by c-rhodes).

Changed prior to commit:
  https://reviews.llvm.org/D87358?vs=290974&id=291168#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87358/new/

https://reviews.llvm.org/D87358

Files:
  clang/lib/AST/ItaniumMangle.cpp
  clang/lib/AST/Type.cpp
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/attr-arm-sve-vector-bits-types.c


Index: clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
===================================================================
--- clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
+++ clang/test/CodeGen/attr-arm-sve-vector-bits-types.c
@@ -4,6 +4,7 @@
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -msve-vector-bits=512 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-512
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -msve-vector-bits=1024 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-1024
 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -msve-vector-bits=2048 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-2048
+// RUN: %clang_cc1 -triple aarch64_32-unknown-darwin -target-feature +sve -target-feature +bf16 -msve-vector-bits=512 -fallow-half-arguments-and-returns -S -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-ILP32
 
 #include <arm_sve.h>
 
@@ -579,3 +580,11 @@
 // CHECK-2048-NEXT:  %local_arr_f64 = alloca [3 x <32 x double>], align 16
 // CHECK-2048-NEXT:  %local_arr_bf16 = alloca [3 x <128 x bfloat>], align 16
 // CHECK-2048-NEXT:  %local_arr_bool = alloca [3 x <32 x i8>], align 2
+
+//===----------------------------------------------------------------------===//
+// ILP32 ABI
+//===----------------------------------------------------------------------===//
+// CHECK-ILP32: @global_i32 = global <16 x i32> zeroinitializer, align 16
+// CHECK-ILP32: @global_i64 = global <8 x i64> zeroinitializer, align 16
+// CHECK-ILP32: @global_u32 = global <16 x i32> zeroinitializer, align 16
+// CHECK-ILP32: @global_u64 = global <8 x i64> zeroinitializer, align 16
Index: clang/lib/CodeGen/TargetInfo.cpp
===================================================================
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -5627,7 +5627,7 @@
       ResType = llvm::ScalableVectorType::get(
           llvm::Type::getInt64Ty(getVMContext()), 2);
       break;
-    case BuiltinType::Float16:
+    case BuiltinType::Half:
       ResType = llvm::ScalableVectorType::get(
           llvm::Type::getHalfTy(getVMContext()), 8);
       break;
Index: clang/lib/AST/Type.cpp
===================================================================
--- clang/lib/AST/Type.cpp
+++ clang/lib/AST/Type.cpp
@@ -2317,38 +2317,13 @@
   assert(isVLSTBuiltinType() && "unsupported type!");
 
   const BuiltinType *BTy = getAs<BuiltinType>();
-  switch (BTy->getKind()) {
-  default:
-    llvm_unreachable("Unknown builtin SVE type!");
-  case BuiltinType::SveInt8:
-    return Ctx.SignedCharTy;
-  case BuiltinType::SveUint8:
-  case BuiltinType::SveBool:
+  if (BTy->getKind() == BuiltinType::SveBool)
     // Represent predicates as i8 rather than i1 to avoid any layout issues.
     // The type is bitcasted to a scalable predicate type when casting between
     // scalable and fixed-length vectors.
     return Ctx.UnsignedCharTy;
-  case BuiltinType::SveInt16:
-    return Ctx.ShortTy;
-  case BuiltinType::SveUint16:
-    return Ctx.UnsignedShortTy;
-  case BuiltinType::SveInt32:
-    return Ctx.IntTy;
-  case BuiltinType::SveUint32:
-    return Ctx.UnsignedIntTy;
-  case BuiltinType::SveInt64:
-    return Ctx.LongTy;
-  case BuiltinType::SveUint64:
-    return Ctx.UnsignedLongTy;
-  case BuiltinType::SveFloat16:
-    return Ctx.Float16Ty;
-  case BuiltinType::SveBFloat16:
-    return Ctx.BFloat16Ty;
-  case BuiltinType::SveFloat32:
-    return Ctx.FloatTy;
-  case BuiltinType::SveFloat64:
-    return Ctx.DoubleTy;
-  }
+  else
+    return Ctx.getBuiltinVectorTypeInfo(BTy).ElementType;
 }
 
 bool QualType::isPODType(const ASTContext &Context) const {
Index: clang/lib/AST/ItaniumMangle.cpp
===================================================================
--- clang/lib/AST/ItaniumMangle.cpp
+++ clang/lib/AST/ItaniumMangle.cpp
@@ -3388,7 +3388,7 @@
   case BuiltinType::ULong:
     TypeName = "__SVUint64_t";
     break;
-  case BuiltinType::Float16:
+  case BuiltinType::Half:
     TypeName = "__SVFloat16_t";
     break;
   case BuiltinType::Float:


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